Parallel peripheral interface

Apparatus for the transfer of data/command between a master controller and one or more client controllers, the apparatus comprising:

• a bi-directional data bus for conveying plural bits of data or command between a master controller and one or more client controllers;
• a direction signal controlling the direction in which data or command bits are conveyed on the data bus as between the master controller and one of the one or more client controllers;
• a pair of ready signals including a transmit ready signal asserted by a source of data or command bits placed on the data bus and including a receive ready signal asserted by a destination for the data or command bits placed on the data bus;
• a clock signal for indicating the presence of valid data or command bits on the data bus on a leading or trailing edge thereof;
• and
• a data/command signal asserted by a source of data or commands placed on the data bus, the data/command signal indicating to the destination for the data or command bits placed on the data bus whether the bits are data or command,
• wherein the apparatus is characterized by plural signals numbering only 3n+w+2 wherein w is the width of the data bus and wherein n is the number of client controllers.

Apparatus for the transfer of data/command between a master controller and one or more client controllers, the apparatus comprising:

• a bi-directional data bus for conveying plural bits of data or command between a master controller and one or more client controllers;
• a direction signal controlling the direction in which data or command bits are conveyed on the data bus as between the master controller and one of the one or more client controllers;
• a pair of ready signals including a transmit ready signal asserted by a source of data or command bits placed on the data bus and including a receive ready signal asserted by a destination for the data or command bits placed on the data bus;
• and
• a clock signal for indicating the presence of valid data or command bits on the data bus on a leading or trailing edge thereof,
• wherein the pair of ready signals includes a bi-directional transmit ready signal and a bi-directional receive ready signal corresponding to each one of the one or more client controllers, and wherein the functions of the transmit ready signals and the receive ready signals within the interface are modified by the state of the direction signal, whereby under a first state of the direction signal a transmit ready signal is asserted by the master controller to select one of the one or more client controllers as a destination for the data or command bits placed on the data bus and a corresponding receive ready signal is asserted by the one client controller to indicate that the one client controller is ready to receive the data or command bits placed on the data bus and whereby under a second state of the direction signal a transmit ready signal is asserted by the one or more client controllers to indicate the one or more client controllers is ready to transmit data or command bits placed on the data bus and a corresponding receive ready signal is asserted by the master controller to acknowledge receipt of data or command bits placed on the data bus by the one client controller.

Apparatus for the transfer of data/command between a master controller and one or more client controllers, the apparatus comprising:

• a bi-directional data bus for conveying plural bits of data or command between a master controller and one or more client controllers;
• a direction signal controlling the direction in which data or command bits are conveyed on the data bus as between the master controller and one of the one or more client controllers;
• a pair of ready signals including a transmit ready signal asserted by a source of data or command bits placed on the data bus and including a receive ready signal asserted by a destination for the data or command bits placed on the data bus;
• and
• a clock signal for indicating the presence of valid data or command bits on the data bus on a leading or trailing edge thereof,
• wherein said clock signal and said direction signal are controlled by the master controller and wherein in a first mode of operation a single instance of data or command is conveyed over the data bus by the source of data or commands and wherein in a second mode of operation plural instances of data or command are conveyed over the data bus by the source of data or commands, whereby in said second mode of operation said pair of ready signals is asserted throughout said plural-instance data or command conveyance and whereby successive plural instances of data or command are conveyed from source to destination across the interface at the frequency of the clock signal.

Apparatus for the transfer of data/command between a master controller and one or more client controllers, the apparatus comprising:

• a bi-directional data bus for conveying plural bits of data or command between a master controller and one or more client controllers;
• a direction signal controlling the direction in which data or command bits are conveyed on the data bus as between the master controller and one of the one or more client controllers;
• a pair of ready signals including a transmit ready signal asserted by a source of data or command bits placed on the data bus and including a receive ready signal asserted by a destination for the data or command bits placed on the data bus;
• a clock signal for indicating the presence of valid data or command bits on the data bus on a leading or trailing edge thereof;
• data/command bus contention arbitration logic enabling only one of the one or more client controllers at a time access to the bus;
• and
• a pair of ready signals for each of the one or more client controllers, wherein each pair of ready signals includes a bi-directional transmit ready signal and a bi-directional receive ready signal, and wherein the functions of the transmit ready signals and the receive ready signals within the interface are modified by the state of the direction signal, whereby under a first state of the direction signal a transmit ready signal is asserted by the master controller to select one of the one or more client controllers as a destination for the data or command bits placed on the data bus and a corresponding receive ready signal is asserted by the one client controller to indicate that the one client controller is ready to receive the data or command bits placed on the data bus and whereby under a second state of the direction signal a transmit ready signal is asserted by the one or more client controllers to indicate the one or more client controllers is ready to transmit data or command bits placed on the data bus and a corresponding receive ready signal is asserted by the master controller to acknowledge receipt of data or command bits placed on the data bus by the one client controller.