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US 6,557,057 B2Granted
Apparatus and method to precisely position packets for a queue based memory controller
AssigneeIntel Corporation
InventorMuthukumar P. Swaminathan
Life of this patent
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Abstract
Disclosed is an apparatus, method, and system to precisely position packets for a queue based memory controller. The memory controller operates with a queue having a plurality of queue positions. A timestamp logic circuit in communication with the memory controller designates scheduled times for each queue position. The memory controller may schedule a packet for a queue position at a scheduled time. The timestamp logic circuit utilizes a plurality of bubble adders to add bubbles to queue positions to adjust the scheduled time for a packet to precisely position the packet.
Claims10
A method comprising:
- assigning times for each queue position of a queue with a timestamp logic circuit, some of the queue positions having a packet scheduled at a scheduled time;
- and
- adding bubbles to queue positions to adjust the scheduled time for a packet to precisely position the packet;
- wherein the timestamp logic circuit comprises a plurality of chained timestamp logic units, the chained timestamp logic units including a plurality of standard timestamp logic units and a first timestamp logic unit, each standard timestamp logic unit corresponding to a queue position and each standard timestamp logic unit designating a scheduled time for the respective queue position, the first timestamp logic unit corresponding to the first queue position and designating the scheduled time for the first queue position.
1 more element
Dependencies are inferred from the claim text.