Performance monitoring and optimizing of controller parameters

A method comprising:

• supplying one or more parameters corresponding to performance of one more components of an integrated circuit to a performance monitoring circuit located within the integrated circuit;
• in the performance monitoring circuit, determining statistical data corresponding to the parameter independent of an interrupt to the integrated circuit;
• interpreting the statistical data according to predetermined parameters to adopt functionality of the component;
• and
• one of altering functionality or maintaining functionality of the component of the integrated circuit according to the interpretation of the statistical data;
• wherein the performance monitoring circuit includes at least one adaptive adder circuit, the adaptive adder circuit including:
• a random number generator circuit providing a random number;
• a counter circuit providing the count value;
• a comparator circuit coupled to compare the random number and the count value and to output a compare signal indicative thereof, the compare signal being provided to the counter circuit as an up/down count signal;
• and
• a logic circuit coupled to receive the performance parameter and the compare signal and output a control signal indicative thereof, the control signal being provided for controlling operation of the counter circuit.

An apparatus comprising:

• means for transmitting one or more parameters corresponding to performance of one more components of an integrated circuit to a performance monitoring circuit located within the integrated circuit;
• in the performance monitoring circuit, means for determining statistical data corresponding to the parameter independent of an interrupt to the integrated circuit;
• means for transmitting the statistical data to a register in the integrated circuit;
• means for interpreting the statistical data according to predetermined parameters to improve functionality of the component;
• and
• means for altering functionality of the component of the integrated circuit according to the interpretation of the statistical data;
• wherein the performance monitoring circuit includes at least one adaptive adder circuit, the adaptive adder circuit including:
• a random number generator circuit providing a random number;
• a counter circuit providing the count value;
• a comparator circuit coupled to compare the random number and the count value and to output a compare signal indicative thereof, the compare signal being provided to the counter circuit as an up/down count signal;
• and
• a logic circuit coupled to receive the performance parameter and the compare signal and output a control signal indicative thereof, the control signal being provided for controlling operation of the counter circuit.

A system comprising:

• at least one processor;
• at least one bus coupled to the processor;
• a memory controller coupled to the bus;
• and
• a performance monitoring circuit, the performance monitoring circuit coupled to receive at least one parameter corresponding to system performance and to provide statistical data corresponding to the parameter;
• wherein the performance monitoring circuit comprises:
• at least one adaptive adder circuit coupled to receive an input signal indicative the parameter of the system and to provide the statistical data corresponding to the parameter.

A computer program product comprising a computer useable medium having computer readable program code means therein, said computer readable program code means in said computer program product comprising:

• computer readable program code means for causing a computer to affect supplying one or more parameters corresponding to performance of one more components of an integrated circuit to a performance monitoring circuit located within the integrated circuit;
• computer readable program code means for causing a computer to affect determining statistical data in the performance monitoring circuit corresponding to the parameter independent of an interrupt to the integrated circuit;
• computer readable program code means for causing a computer to affect interpreting the statistical data according to predetermined parameters to adopt functionality of the component;
• and
• computer readable program code means for causing a computer to affect one of altering functionality and maintaining functionality of the component of the integrated circuit according to the interpretation of the statistical data;
• wherein the performance monitoring circuit includes at least one adaptive adder circuit, the adaptive adder circuit including:
• a random number generator circuit providing a random number;
• a counter circuit providing the count value;
• a comparator circuit coupled to compare the random number and the count value and to output a compare signal indicative thereof, the compare signal being provided to the counter circuit as an up/down count signal;
• and
• a logic circuit coupled to receive the performance parameter and the compare signal and output a control signal indicative thereof, the control signal being provided for controlling operation of the counter circuit.