Fast round robin priority port scheduler for high capacity ATM switches
AssigneeNEC USA, Inc.
InventorsSharif M. Shahrier, Alexander T. Ishii
Life of this patent
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Abstract
A novel architecture and implementation of a Round-Robin Scheduler (RRS) for high capacity ATM switches is presented. A port is selected from a set of alternating real-time/non real-time priority ports, based on the priority of the port, the minimum cell-rate (MCR) assigned to the ports and the backpressure signals coming from the output buffers. A fast implementation of the scheduler was derived using a binary tree structure. The nodes in the binary tree act as “cut through” switches, and thus the scheduler is able to operate at high speed. This scheduler is amenable for implementation in high speed silicon technology. It is compact in terms of logic gate requirements, very scalable and is a viable option in Gigabit ATM switches.
Claims18
An ATM switch for controlling a flow of ATM cells in a network, comprising:
- input ports;
- output ports;
- and
- a centralized scheduler, that uses a tree architecture to process packets containing data referencing a previously selected input port, to select a particular input port of said input ports and to send a particular input port ATM cell to a designated output of said output ports.
A method of scheduling input signals arriving at input ports of a switch to be sent to output ports of said switch, comprising the steps of:
- determining ready states of said input ports;
- selecting one of said input ports in a round robin fashion based on said ready states;
- and
- sending input signals from said selected of said input ports to a designated output port;
- wherein said selecting step uses a tree architecture having a given number of nodes such that packets, containing information related to a previously selected input port, said ready states and said output ports, pass through said nodes and a particular packet is selected having said designated output port.
An ATM switch for controlling a flow of ATM cells in a network, comprising:
- input ports;
- output ports;
- and
- a centralized scheduler to process packets containing data referencing a previously selected input port, to select a particular input port of said input ports and to send a particular input port ATM cell to a designated output of said output ports;
- wherein said centralized scheduler functions so that a total processing delay in the flow of the ATM cells in the switch increases only logarithmically when a total number of ports of the switch is increased.
Dependencies are inferred from the claim text.