Programmable logic array device with random access memory configurable as product terms
AssigneeAltera Corporation
InventorFrancis B. Heile
Life of this patent
Estimating the term…
Abstract
A look-up-table-based programmable logic device is provided with memory circuitry which can be operated either as random access memory (“RAM”) or to perform product term (“p-term”) logic. Each individual row of the memory is separately addressable for writing data to the memory or, in RAM mode, for reading data from the memory. Alternatively, multiple rows of the memory are addressable in parallel to read p-terms from the memory. The memory circuitry of the invention is particularly useful as an addition to look-up-table-type programmable logic devices because the p-term capability of the memory circuitry provides an efficient way to perform wide fan-in logic functions which would otherwise require trees of multiple look-up tables.
Claims20
A device comprising:
- a plurality of logic blocks;
- at least one memory element coupled to the plurality of logic blocks, wherein the at least one memory element stores a plurality of data items;
- and
- a plurality of memory selecting lines coupled to the at least one memory element, wherein the at least one memory element is selectively configurable to perform logic-AND and logic-OR functions on multiple ones of the plurality of data items that are selected in response to signals transmitted through the plurality of memory selecting lines.
A method for memory configuration comprising:
- receiving control signals transmitted through a plurality of memory selecting lines;
- and
- configuring at least one memory element to perform logic-AND and logic-OR functions on multiple ones of a plurality of data items stored in the memory element, the multiple data items being selected in response to the control signals.
A method for memory configuration comprising:
- receiving control signals transmitted through a plurality of memory selecting lines;
- configuring at least one memory element to perform logic-AND operations on multiple ones of a plurality of data items stored in the memory element, the multiple data items being selected in response to the control signals;
- and
- storing data items within the at least one memory element, wherein the logic-AND operations and the storing may occur substantially concurrently.
Dependencies are inferred from the claim text.