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US 6,556,499 B2Granted
Nonvolatile semiconductor memory and read method
AssigneesHitachi, Ltd., Hitachi ULSI Engineering Corp., Hitachi Device Engineering Co., Ltd.
InventorsHiroshi Sato, Shoji Kubono, Toshinori Harada, Takayuki Kawahara, Naoki Miyamoto
Life of this patent
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Abstract
In a nonvolatile semiconductor memory in which multiple-value information is stored in one memory cell by setting a plurality of threshold values, data is successively read from word lines while continuously changing the word-line read level from a lowest level to a highest level, and the next bit line is selectively precharged in accordance with the data stored in latch means for storing read data.
Claims4
A nonvolatile memory device comprising:
- a pre-charge circuit;
- a plurality of memory cells, each of which has a threshold voltage corresponding to data;
- and
- a plurality of data lines, each of which is coupled to corresponding ones of said plurality of memory cells,
- wherein, when reading out data from ones of said plurality of memory cells, said ones of memory cells are supplied with a read voltage which is at least three voltage levels,
- wherein, in a first step, said ones of memory cells are supplied a lowest level voltage of said read voltage, and said pre-charge circuit supplies a pre-charge voltage to said data lines coupled to said ones of memory cells supplied with said read voltage before supplying said read voltage, and
- wherein, in a second step, said ones of memory cells are supplied a higher level voltage of said read voltage, and said pre-charge circuit supplies said pre-charge voltage to said data lines which are not connected to memory cells storing said first data corresponding to said lowest level voltage.
4 more elements
Dependencies are inferred from the claim text.