System and method for redundancy implementation in a semiconductor device
AssigneeVirage Logic Corporation
InventorsAlex Shubat, Chang Hee Hong
Life of this patent
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Abstract
A system and method for redundancy implementation in an integrated semiconductor device having at least one memory instance that includes a prime memory array and a redundant portion. A fuse box register is provided outside the memory macro cell associated with the memory instance. The fuse box register is operable to store location information pertaining to a faulty portion in the prime memory array. A redundancy scan storage element in the memory instance is operable to receive the location information from the fuse box register, which location information is used for replacing at least a part of the faulty portion in the prime memory array with at least a part of the redundant portion.
Claims20
An integrated semiconductor device, comprising:
- at least one memory instance having a prime memory array and a redundant memory portion;
- fuse box means disposed external to said at least one memory instance in a selected area of said integrated semiconductor device, said fuse box means for storing location information pertaining to a faulty portion in said prime memory array;
- storage means disposed in said at least one memory instance for receiving said location information from said fuse box means;
- means for transferring said location information to said storage means;
- and
- means for replacing at least a part of said faulty portion in said prime memory array with at least a part of said redundant memory portion based on said location information.
A memory compiler for designing an integrated semiconductor device with redundancy, comprising:
- a memory macro cell associated with at least one memory instance that includes a prime memory array and a redundant memory portion;
- a fuse box register disposed external to said memory macro cell, said fuse box register for storing location information relating to a faulty portion in said prime memory array;
- and
- storage means disposed in said at least one memory instance for receiving said location information from said fuse box register, wherein said location information is used for replacing at least a part of said faulty portion with at least a part of said redundant memory portion.
A method of effectuating redundancy in an embedded memory circuit having a main memory area and a redundant memory portion, comprising the steps:
- storing location information in a fuse area outside said embedded memory circuit, said location information pertaining to a faulty portion in said main memory area;
- transferring said location information to a redundancy scan storage element in said memory circuit;
- and
- replacing at least a part of said faulty portion in said main memory area with at least a part of said redundant memory portion based on said location information.
Dependencies are inferred from the claim text.