Circuit configuration and method for synchronization
AssigneeInfineon Technologies AG
InventorsHerbert Benzinger, Norbert Wirth, Ralf Schneider
Life of this patent
Estimating the term…
Abstract
A circuit configuration and a method for the synchronization of signals include transmitting signals in parallel through data lines and buffer-storing the signals in a synchronizing unit. A clock signal is determined from the signals of a data line and is used for synchronizing the outputting of the signals. The signals are output in the order in which the signals were read. The signals are likewise output through a plurality of data lines, the signals being output temporally synchronously. Propagation time differences are compensated due to the buffer-storage. Moreover, the clock signal is determined from the signals themselves. Consequently, the use of an additional clock signal is not necessary.
Claims17
A circuit configuration, comprising:
- a buffer memory having memory arrays each with memory cells;
- an input unit connected to said memory and having:
- inputs through which data is fed in parallel at a given time clock and stored in said memory;
- and
- input pointers each associated with said memory and each to be controlled by a clock signal;
- an output unit connected to said memory and having outputs, said output unit outputting data through said outputs after buffer-storage in said memory;
- a detection unit connected to said input unit and to said input pointers;
- each of said input pointers, under control of the clock signal, connected to a respective one of said memory arrays for a predetermined time period;
- each of said input pointers reading a datum present at one of said inputs into a respective one of said memory cells;
- each of said input pointers changing, after the predetermined time period has elapsed, to another one of said memory arrays;
- said detection unit determining, from the data fed in, the given time clock with which the data are fed in;
- and
- said detection unit feeding to said input pointers the clock signal dependent on the given time clock determined.
A method for synchronizing data, which comprises:
- outputting data through data lines in the form of data groups in parallel according to a defined order;
- storing the data for each data line in buffer memories through an input in a storage operation within a time window;
- detecting a time clock with which data is fed to the input for each data line;
- and
- adapting a temporal position of the time window for a storage operation to the detected time clock.
A method for synchronizing data, which comprises:
- providing a buffer memory having memory arrays each with memory cells;
- connecting an input unit and an output unit to the memory;
- associating input pointers with the memory;
- connecting a detection unit to the input unit and to the input pointers;
- feeding in data in parallel based upon a given time clock to inputs of the input unit;
- determining the given time clock with the detection unit based upon the data fed to the inputs;
- feeding, with the detection unit, a clock signal to the input pointers dependent on the given time clock determined;
- connecting, for a predetermined time period, each of the input pointers to a respective one of the memory arrays under control of the clock signal;
- reading, with each of the input pointers, a datum present at one of the inputs into a respective one of the memory cells;
- changing, after the predetermined time period has elapsed, each of the input pointers to another one of the memory arrays;
- and
- outputting synchronized data through outputs of an output unit after buffer-storage in the memory.
Dependencies are inferred from the claim text.