Dielectric ceramic composition, multi-layer ceramic capacitor using the same, and manufacturing method therefor

A multi-layer ceramic capacitor comprising:

• a plurality of dielectric ceramic layers;
• a plurality of internal electrodes disposed on said dielectric ceramic layers, said internal electrodes and said dielectric ceramic layers being alternately stacked to form a stacked chip;
• and
• a pair of outer electrodes formed on both sides of said stacked chip;
• wherein said dielectric ceramic layers comprise a dielectric ceramic composition which comprises 100 moles of barium calcium titanate BaCaxTiO3(0.001≦x≦0.02), 0.5-4 moles of MgO, 0.01-0.5 moles of MnO, 0.1-2 moles of BaO, 0.1-2 moles of CaO, 1-4 moles of SiO2 and 0.1-3 moles of at least one or more compounds selected from the group consisting of Y2O3, Dy2O3, Ho203 and Er2O3.

A method for manufacturing a multi-layer ceramic capacitor comprising the steps of:

• preparing ceramic powders comprising
• 0.5-4 moles of MgO,
• 0.01-0.5 moles of MnO,
• 0.1-2 moles of BaO,
• 0.1-2 moles of CaO,
• 1-4 moles of SiO2 and
• 0.1-3 moles of at least one or more compounds selected from the group consisting of Y2O3, Dy2O3, Ho203 and Er2O3,
• per 100 moles of barium calcium titanate BaCaxTiO3(0.001≦x≦0.02), wherein at least two or more kinds of said ceramic powders are mixed and calcinated;
• crushing the calcinated powders, mixing said calcinated powders and remaining powders with barium calcium titanate, and adding a binder and a solvent so as to form a slurry;
• forming said slurry into a plurality of sheets, and printing Ni or an Ni alloys onto some of said sheets so as to form internal electrodes;
• stacking alternately the sheets with and without the internal electrodes, whereby a stacked chip is formed, and sintering said chip;
• and
• disposing a pair of external electrodes on both sides of said stacked chip so as to be connected to said internal electrodes, whereby a multi-layer ceramic capacitor with a low deviation of dielectric properties is formed.