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US 6,556,057 B2Granted
Noise suppression circuitry and method
AssigneeSTMicroelectronics S.r.l.
InventorDavid C. McClure
Life of this patent
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Abstract
A circuit and method are disclosed for monitoring the voltage level of an electrical signal, such as an unregulated power supply. The circuit includes a comparator that compares the electrical to the voltage reference and generates an output having a value that is based upon the comparison. A oscillation suppression circuit receives the output of the comparator and generates an output signal that follows the output of the comparator once the output of the comparator remains stable and in the same logic state for a predetermined of time.
Claims40
A power supply detect circuit, comprising:
- a comparator for comparing a power supply signal and a reference voltage signal and generating an output signal based upon the comparison;
- and
- a first circuit having an input coupled to the output of the comparator and an output signal driven to a logic state based upon the output of the comparator being in the same logic state substantially entirely over a plurality of consecutive time periods, the first circuit drives the output signal thereof to a first logic state upon the output of the comparator being in one of the first logic state and a second logic state substantially entirely over a plurality of consecutive time periods, and to the second logic state upon the output of the comparator being in the other of the first logic state and the second logic state substantially entirely over a plurality of consecutive time periods.
A power supply detect circuit, comprising:
- a comparator for comparing a power supply signal and a reference voltage signal and generating an output signal based upon the comparison;
- and
- a first circuit having an input coupled to the output of the comparator and an output signal driven to a first logic state upon the output of the comparator being in the same logic state substantially entirely over a plurality of consecutive time periods, wherein the first circuit comprises;
- shift register circuitry.
1 more element
A method for monitoring an electrical signal, comprising:
- receiving a digital signal;
- and
- generating an output signal that changes logic state whenever the digital signal changes from one logic state to another logic state and thereafter remains in the changed-to logic state substantially entirely over a predetermined period of time.
An integrated circuit, comprising:
- a noise suppression circuit having an input coupled to receive a first signal that is a digital signal and an output signal that is asserted when the first signal changes from a first logic state to a second logic state and remains in the second logic state substantially entirely over a predetermined period of time, and de-asserted when the first signal changes from the second logic state to the first logic state and remains in the first logic state substantially entirely over a predetermined period of time.
A circuit for monitoring an electrical signal, comprising:
- means for receiving a digital signal;
- and
- means for generating an output signal that changes logic state whenever the digital signal changes from one logic state to another logic state and thereafter remains in the changed-to logic state substantially entirely over a predetermined period of time.
A method of suppressing noise in a signal, comprising:
- receiving a digital signal;
- upon the digital signal transitioning to a first logic state, counting a period of time the digital signal remains in the first logic state;
- upon the digital signal transitioning to a second logic state, counting a period of time the digital signal remains in the second logic state;
- upon the digital signal remaining in the first logic state for a first predetermined period of time, driving an output signal to one of the first logic state and the second logic state;
- and
- upon the digital signal remaining in the second logic state for a second predetermined period of time, driving the output signal to the other of the first logic state and the second logic state.
3 more elements
A circuit, comprising:
- first circuitry for receiving a digital signal, counting a period of time the digit al signal remains in a first logic state upon the digital signal transitioning to the first logic state, and counting a period of time the digital signal remains in a second logic state upon the digital signal transitioning to the second logic state, and
- second circuitry for generating an output signal that transitions to one of the first logic state and the second logic state upon the digital signal remaining in the first logic state for a first predetermined period of time, and transitions to the other of the first logic state and the second logic state upon the digital signal remaining in the second logic state for a second predetermined period of time.
Dependencies are inferred from the claim text.