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US 6,556,048 B1Granted
High speed low skew LVTTL output buffer with invert capability
AssigneeCypress Semiconductor Corporation
InventorAnthony Dunne
Life of this patent
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Abstract
A prebuffer circuit configured to generate one or more output control signals in response to one or more current sources and an input signal. The one or more output control signals may reduce a process dependent charge to discharge skew.
Claims19
A circuit comprising:
- a plurality of multiplexers configured to generate a plurality of input signals each in response to multiplexing a first signal and a second signal, wherein (i) said second signal is an inverse of said first signal, (ii) a first of said multiplexers is controlled by a first invert signal and (iii) a second of said multiplexers is controlled by a second invert signal;
- and
- a plurality of prebuffer circuits each configured to generate a plurality of output control signals in response to (i) a plurality of current sources and (ii) one said input signal, wherein said output control signals reduce a process dependent charge to discharge skew.
A method for generating a plurality of output control signals comprising the steps of:
- (A) generating a plurality of input signals each in response to multiplexing a first signal and a second signal, where (i) said second signal is an inverse of said first signal, (ii) a first of said multiplexes is controlled by a first invert signal and (iii) a second of said multiplexes is controlled by a second invert signal;
- and
- (B) generating said output control signals in response to (i) a plurality of current sources and (ii) said input signals, wherein said output control signals reduce a process dependent charge to discharge skew.
A circuit comprising:
- means for generating a plurality of input signals each in response to multiplexing a first signal and a second signal, where (i) said second signal is an inverse of said first signal, (ii) a first of said multiplexes is controlled by a first invert signal and (iii) a second of said multiplexes is controlled by a second invert signal;
- and
- means for generating a plurality of output control signals in response to (i) a plurality of current sources and (ii) said input signals, wherein said output control signals reduce a process dependent charge to discharge skew.
Dependencies are inferred from the claim text.