Integrated circuit having interconnect to a substrate and method therefor
AssigneeMotorola, Inc.
InventorDouglas M. Reber
Life of this patent
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Abstract
A contact between a source/drain and a gate is made by making a selected portion of the gate dielectric conductive by an implant into that selected portion of the gate dielectric. The gate material is in a layer over the entire integrated circuit. Areas where gates are to connect to source/drains are indentified and the gate dielectric at those identified locations is implanted to make it conductive. The source/drains are formed so that they extend under these areas of conductive gate dielectric so that at these locations the implanted gate dielectric shorts the gate to the source/drain. This saves area on the integrated circuit, reduces the need for interconnect layers, and avoids the problems associated with depositing and etching polysilicon on an exposed silicon substrate.
Claims17
A semiconductor device comprising:
- a first transistor comprising:
- a first gate electrode formed over the first gate dielectric;
- a first conductive region formed within a substrate and adjacent the first gate dielectric;
- a second conductive region formed within the substrate and adjacent the first gate dielectric;
- and
- a first gate dielectric formed over the substrate;
- and
- a second transistor comprising:
- a second gate electrode formed over the first gate dielectric;
- a third conductive region formed within the substrate and adjacent the second gate dielectric;
- a fourth conductive region formed within the substrate and adjacent the second gate dielectric;
- and
- a second gate dielectric formed over the substrate;
- and wherein:
- the second gate electrode is part of a conductive layer;
- the conductive layer electrically contacts a conductive doped dielectric;
- and
- the conductive doped dielectric is electrically connected to the first conductive region.
A semiconductor device comprising:
- a first active area;
- a second active area;
- a first dielectric layer over a first portion of the first active area;
- a first conductive layer over the first dielectric layer;
- a second dielectric layer over-the second active area;
- a first portion of a second conductive layer over the second dielectric layer;
- a conductive doped dielectric over a second portion of the first active area;
- and
- a second portion of the second conductive layer over the conductive doped dielectric and the first active area.
An integrated circuit, comprising:
- a substrate having a first well region;
- a transistor formed in the first well region having a first source/drain region in the first well region and a second source/drain region;
- a circuit feature having a conductive electrode extending over the first source/drain region and physically,separated from the first source/drain by a conductive implanted dielectric, wherein the conductive implanted dielectric electrically shorts the conductive electrode to the first source/drain region.
Dependencies are inferred from the claim text.