US 6,555,902 B2 · Multiple stacked-chip packaging structure

Abstract

A packaging structure comprises a substrate, a plurality of semiconductor chips contiguously mounted into a plurality of stacked semiconductor chip sets, a plurality of supporting members, a plurality of adhesive layers, a plurality of wires and a molding compound. Each of the semiconductor chip sets comprises at least a semiconductor chip, each semiconductor chip having plurality of bonding pads. The size deviation between the semiconductor chip sets is less than 0.3 mm. The supporting members separate from one another the semiconductor chip sets stacked above the substrate. The adhesive layers bond the substrate, the supporting members and the semiconductor chips to one another. The wires connect the semiconductor chips to one another and to the substrate. The molding compound encapsulates the substrate, the semiconductor chips, the supporting members, and the adhesive layers.

Claims15

Dependent claims

A multiple stacked-chip package comprising:

at least a first semiconductor chip set comprising at least two semiconductor chips over a substrate, each having a plurality of bonding pads, positioned adjacent to each other along a same plane;
at least a second semiconductor chip set disposed over the first semiconductor chip set;
at least a supporting member separating the second semiconductor chip set from the first semiconductor chip set;
a plurality of heat conductive adhesive layers bonding the supporting members, the semiconductor chips and the substrate to one another, wherein said semiconductor chips of said first semiconductor chip set are bonded together through said heat conductive adhesive layers;
and
a plurality of wires connecting the first and second semiconductor chips sets to a substrate through the bonding pads, wherein a wiring bonding for wire connection is accomplished by a thermosonic method.

3 more elements

Dependencies are inferred from the claim text.

Multiple stacked-chip packaging structure

Life of this patent

Multiple stacked-chip packaging structure

Life of this patent

Abstract

Claims15