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US 6,555,475 B1Granted
Arrangement and method for polishing a surface of a semiconductor wafer
AssigneeLSI Logic Corporation
InventorsJayanthi Pallinti, Ron Nagahara
Life of this patent
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Abstract
An arrangement for polishing a semiconductor wafer is disclosed. The arrangement includes a plurality of preassembled polishing pad assemblies which can be selectively coupled to, and decoupled from, an actuating mechanism for rotating the polishing pad assemblies. An associated method of polishing a semiconductor wafer is also disclosed.
Claims12
A method of polishing a surface of a semiconductor wafer, comprising:
- (a) placing an attachment mechanism in a first coupling mode of operation such that a first polishing pad assembly which includes (i) a first support member having a first pad receiving surface and (ii) a first polishing pad attached to said first pad receiving surface is (A) attached to said attachment mechanism and (B) coupled to an actuating mechanism which is operatively linked to said attachment mechanism;
- (b) placing said first polishing pad in contact with said surface of said semiconductor wafer while said actuating mechanism rotates said first polishing pad assembly;
- (c) removing said first polishing pad from said surface of said semiconductor wafer;
- (d) placing said attachment mechanism in a decoupling mode of operation such that said first polishing pad assembly is (A) detached from said attachment mechanism and (B) decoupled from said actuating mechanism;
- and
- (e) placing said attachment mechanism in a second coupling mode of operation such that a second polishing pad assembly which includes (i) a second support member having a second pad receiving surface and (ii) a second polishing pad attached to said second pad receiving surface is (A) attached to said attachment mechanism and (B) coupled to said actuating mechanism.
3 more elements
Dependencies are inferred from the claim text.