Semiconductor memory device incorporating therein ruthenium electrode and method for the manufacture thereof
AssigneeHynix Semiconductor Inc.
InventorSung-Eon Park
Life of this patent
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Abstract
A semiconductor device for use in a memory cell includes an active matrix provided with a semiconductor substrate, transistors formed on the semiconductor substrate, an insulating layer formed over the transistors and the semiconductor substrate, and a contact hole electrically connected to the transistors, a first ruthenium (Ru) layer formed over the contact hole and upon the insulating layer, and a second Ru layer with a rugged surface formed on top of the first Ru layer.
Claims21
A semiconductor device for use in a memory cell, the device comprising:
- an active matrix including a semiconductor substrate, at least first and second transistors formed on the semiconductor substrate, an insulating layer formed over the transistors and on portions of the semiconductor substrate, and a contact aperture having bottom and side surfaces disposed between the first and second transistors;
- a first ruthenium (Ru) layer formed on the bottom and side surfaces of the contact aperture and on the insulating layer;
- and
- a second Ru layer with a rugged surface formed on the first Ru layer.
A method for manufacturing a semiconductor device for use in a memory cell, the method comprising:
- a) preparing an active matrix having a semiconductor substrate, at least first and second transistors on the semiconductor substrate, a contact aperture having bottom and side surfaces disposed between the first and second transistors, and an insulating layer formed over the transistors;
- b) forming a first ruthenium Ru layer on the bottom and side surfaces of the contact aperture and on the insulating layer;
- and
- c) forming a second Ru layer with a rugged surface on the first Ru layer.
A semiconductor device for use in a memory cell, the device comprising:
- an active matrix including a semiconductor substrate, at least a first and second transistor formed on the semiconductor substrate, an insulating layer formed over the transistors and the semiconductor substrate, and a contact aperture having bottom and side surfaces disposed between the first and second transistors;
- a first ruthenium (Ru) layer formed over the contact aperture and on a portion of the insulating layer adjacent the contact aperture;
- and
- a second Ru layer with a rugged surface formed on the first Ru layer.
Dependencies are inferred from the claim text.