Process for fabricating a top side pitted diode device
AssigneeAgilent Technologies, Inc.
InventorFrank Sigming Geefay
Life of this patent
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Abstract
A method of fabricating a diode device, such as a PIN diode, includes forming top and bottom regions of opposite conductivity types and includes anisotropically etching into the top surface to form a pit having side walls that converge with approach to the bottom surface. However, the pit does not extend to the bottom surface. In the PIN diode embodiment, the pit terminates within an intrinsic region that separates a bottom surface diffusion region from a diffusion region along the walls of the anisotropically etched pit. The anisotropic etching approach provides a degree of self regulation with regard to the geometries of the pit. A process flow of steps is described, which allows thicker and larger diameter wafers to be used in the formation of an array of such diode device.
Claims18
A method of fabricating a diode device in a substrate having a top surface and a bottom surface, said method comprising the steps of:
- forming first and second active regions in said substrate such that said first and second active regions respectively have first and second conductivity types, including defining an area on said top surface for forming a pit and anisotropically etching a single pit into said area such that said pit extends partially through said substrate and has sidewalls which converge with approach toward said bottom surface, wherein forming said first active region includes introducing a dopant having said first conductivity type into said converging sidewalls of said pit, said first and second active regions being conductively coupled in response to a bias voltage;
- and
- forming a conductive material along said converging sidewalls of said pit, including forming the conductive material to be directly coupled to said first active region so that said bias voltage is applied to said first active region via said converging sidewalls.
A method of fabricating a PIN device comprising the steps of:
- providing a one-piece substrate structure having an intrinsic region;
- introducing a first dopant into a second side of said substrate structure to form a junction region within said intrinsic region;
- forming an oxide layer on said junction region;
- forming a patterned nitride layer on a selected portion of said intrinsic region at a first side of said substrate structure while leaving an area of said first side exposed for formation of a pit, said first side being opposite to said second side;
- applying an anisotropic etchant to said exposed area of said first side such that a pit is formed to have pyramidal walls, said pit being formed partially through said intrinsic region;
- Introducing a second dopant into said pyramidal walls of said pit, said first and second dopants being selected such that said substrate structure includes p-doped and n-doped regions spaced apart by said intrinsic region;
- forming a first conductive contact in said pit to conform to a geometry of said pyramidal walls;
- and
- forming a second conductive contact on said second side, thereby enabling external connections to said PIN device at opposite sides of said substrate structure, so that PIN conduction is provided between said first conductive contact along pyramidal walls of said pit at said first side and said second conductive contact at said second side.
A PIN device comprising:
- a single-piece substrate having a top surface and a bottom surface;
- an inverted pyramidal pit extending from said top surface to a central intrinsic region of said single-piece substrate, said pit terminating without reaching said bottom surface;
- a first diffusion layer along sidewalls of said pit, said first diffusion layer having a first conductivity type;
- a first electrical contact along said first diffusion layer of said pit, said first electrical contact being next to said first diffusion layer;
- a second diffusion layer along said bottom surface of said single-piece substrate, said second diffusion layer having a second conductivity type opposite to said first conductivity type, said second diffusion layer being spaced apart from said first diffusion layer by said central intrinsic region;
- and
- conductive paths along said sidewalls of said pit to said first diffusion layer and to said second diffusion layer along said bottom surface of said single-piece substrate.
Dependencies are inferred from the claim text.