Simultaneous formation of charge storage and bitline to wordline isolation

A method of forming a non-volatile semiconductor memory device, comprising sequentially:

• forming a charge trapping dielectric over a substrate, the substrate having a core region and a periphery region;
• removing at least a portion of the charge trapping dielectric in the periphery region;
• forming a gate dielectric having a first thickness in the periphery region;
• forming buried bitlines in the core region;
• increasing the thickness of the gate dielectric in at least a portion of the periphery region to provide a gate dielectric having a second thickness;
• and
• forming gates in the core region and the periphery region.