Chip size package semiconductor device and method of forming the same
AssigneeNEC Corporation
InventorsHirofumi Nakamura, Masamoto Tago
Life of this patent
Estimating the term…
Abstract
The present invention provides a semiconductor chip having a bonding face to be mounted onto a mother board, wherein a low elastic modulus resin layer is provided in contact directly with the bonding face of the semiconductor chip without intervening any interposer to form a chip size package, and the low elastic modulus resin layer has at least a conductive pattern of a build-up type, and wherein the low elastic modulus resin layer has both a sufficiently low elastic modulus and a sufficiently large thickness for allowing realization of a stress caused due to a difference in thermal expansion coefficient between the semiconductor chip and the mother board.
Claims7
A method of forming a semiconductor chip having a bonding face to be mounted onto a mother board, said method comprising the steps of:
- forming a low elastic modulus resin layer in contact directly with said bonding face of said semiconductor chip without intervening any interposer to form a chip size package;
- and
- forming at least a conductive pattern of a build-up type in said low elastic modulus resin layer, and
- wherein said low elastic modulus resin layer has both a sufficiently low elastic modulus and a sufficiently large thickness for allowing realization of a stress caused due to a difference in thermal expansion coefficient between said semiconductor chip and said mother board.
Dependencies are inferred from the claim text.