Method for efficient analysis semiconductor failures

A method for characterizing a semiconductor chip according to types of failures comprising:

• testing the semiconductor chip to determine a fail count, and a fail region count, the semiconductor chip including a plurality of components;
• defining dimensions for component failure types for the semiconductor chip, each component represented by a characteristic number of bits;
• determining a number of different component types;
• computing a ratio of the fail count to the fail region count, the fail count being the number of individual failures, and the fail region count being the number of chip regions having at least one failing bit;
• calculating an average number of bits which represent each component dimension, the averages being determined between components which are proximate in size based on the total number of bits, includes the steps of:
• calculating (L+S)/2=Yn−1
• where L is the size of the failure dimensions incorporating a larger number of individual bit failures between the pair L and S, S is the size of the failure dimension incorporating a smaller number of individual bit failures between the pair L and S, where L and S are proximate in size, where Yn−1 is a threshold to determine whether the ratio is nearest L, where n is the number of different component types;
• where for each subsequent iteration set n=n−1, and set L equal to S from the previous calculation of Yn−1;
• calculate Y until n−1=1;
• and
• comparing the averages to the ratio to determine a dominant type of component failure on the semiconductor chip, the dominant type of component failure being identified by the dimension nearest the ratio where the dimension is the number of bits included in the component failure type.

A method for characterizing semiconductor failures, comprising:

• testing for failures to determine a fail count and a fail region count, the fail count being the number of individual failures and the fail region count being a number of regions affected by at least one failure;
• defining dimensions for component failure types for a semiconductor chip. The semiconductor chip including a plurality of components, each component represented by a characteristic number of bits;
• determining a number of different component types;
• computing a ratio of the fail count to the fail region count, the fail count being the number of individual failures, and the fail region count being the number of chip regions having a least one failing bit;
• calculating an average number of bits which represent each dimension, the averages being determined between dimensions which are proximate in size based on a total number of bits, includes the steps of:
• calculating (L+S)/2=Yn−1
• where L is the size of the failure dimension incorporating a larger number of individual bit failures between the pair L and S, S is the size of a failure dimension incorporating the smaller number of individual bit failures between the pair L and S, where L and S are proximate in size, where Yn−1 is the threshold to determine whether the ratio is nearest L, where n is the number of different component types;
• where for each subsequent iteration set n=n−1, and set L equal to S from the previous calculation of Yn−1;
• calculate Y until n−1=1;
• and
• comparing the component dimensions to the ratio to determine a dominate type of component failure on the semiconductor chip using the averages as threshold values, the dominant type of component failure having the dimension nearest the ratio, components are compared on the basis of the number of bits which each includes, in accordance with the following steps:
• for each value of Yn−1 and its corresponding L and S failure dimensions, determine if the ratio is greater then Yn−1, if so the dominate failure is L;
• where n−1 is equal to 1, determine if the ratio is greater than Yn−1, if so the dominant failure dimensions is L, if not the dominant failure is S.