Information processing device and electronic equipment

Abstract

An objective is to provide information processing device and electronic equipment that is capable of transferring data rapidly while using start-stop synchronization. A communication section (142) comprised within a microcomputer (140) comprises a frequency division circuit (146) that divides a BCLK signal to generate an SMC1 signal (a clock signal for sampling each bit of data sent by start-stop synchronization) and a send/receive circuit (144) for transmitting data based on SMC1. The communication section (142) supplies the BCLK signal to a debugging tool (150) as a signal for enabling a frequency division circuit (156) to generate another signal SMC2. A division ratio control section (158) changes a division ratio FD2 in accordance with the frequency of BCLK and transfers division ratio data to the communication section (142), and the division ratio control section (148) changes a division ratio FD1 in the frequency division circuit (146) based on this division ratio data. This ensures that data can always be transferred at the most suitable fast communication speed. The BCLK signal can also be used as a sampling clock signal for trace data in user program execution mode.

Dependencies are inferred from the claim text.