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US 6,553,481 B1Granted
System and method for smart card with memory
AssigneeSwapcard.com Inc.
InventorPhilip Sydney Langton
Life of this patent
Estimating the term…
Abstract
A system method and computer program for smart card with memory is disclosed. A very low cost approach two embodiment is disclosed, making use of a microcontroller with a FLASH memory or a WORM memory. An approach two programming a flash memory under the control of instructions within that memory itself is disclosed. Utilizing the invention it is possible to build smart cards at a low cost them heretofore.
Claims18
A storage device comprising:
- a wireless data transmitter;
- a wireless data receiver;
- a clock circuit for generating a plurality of clock signals having a periodicity;
- a computing engine coupled to an energy source, the wireless data transmitter,
- the wireless data receiver, the clock circuit and a set of operator controls,
- the computing engine comprising a volatile memory and a non-volatile memory containing a data set, the non-volatile memory further containing a set of instruction codes,
- wherein the computing engine is powered by the energy source and
- executes instructions selected from the set of instruction codes, and
- wherein the computing engine performs an action selected from a list consisting of receiving data from the wireless data receiver and sending data to the wireless data transmitter in response to a stimulus from a control selected from the set of operator controls;
- a plurality of buffers, the buffers being external to the computing engine;
- a reset circuit coupled to the computing engine for initializing the computing engine;
- and
- a programming circuit coupled to the computing engine for writing to the data set in response to a signal from the computing engine and according to the contents of the plurality of buffers
- wherein the programming circuit holds the computing engine in a reset state for a duration exceeding about eight periods of the clock signals while data is being written to the data set.
11 more elements
A storage device consisting essentially of:
- an energy source consisting essentially of at least one electrochemical cell;
- a wireless data transmitter;
- a wireless data receiver;
- a clock circuit for generating a plurality of clock signals having a periodicity;
- a computing engine coupled to the energy source, the wireless data transmitter,
- the wireless data receiver, the clock circuit and a set of operator controls,
- the computing engine comprising a volatile memory and a non-volatile memory containing a data set, the non-volatile memory further containing a set of instruction codes,
- wherein the computing engine is powered by the energy source and executes instructions selected from the set of instruction codes, and
- wherein the computing engine performs an action selected from a list consisting of receiving data from the wireless data receiver and sending data to the wireless data transmitter in response to a stimulus from a control selected from the set of operator controls;
- a plurality of buffers, the buffers being external to the computing engine;
- a reset circuit coupled to the computing engine for initializing the computing engine;
- and
- a programming circuit coupled to the computing engine for writing to the data set in response to a signal from the computing engine and according to the contents of the plurality of buffers
- wherein the programming circuit holds the computing engine in a reset state for a duration exceeding about eight periods of the clock signals while data is being written to the data set.
11 more elements
A storage device consisting essentially of:
- an energy source consisting essentially of at least one electrochemical cell;
- a wireless data transmitter;
- a wireless data receiver;
- a set of operator controls comprising at least one switch;
- a clock circuit for generating a plurality of clock signals having a periodicity;
- a computing engine coupled to the energy source, the wireless data transmitter,
- the wireless data receiver, the clock circuit and the set of operator controls,
- the computing engine comprising a volatile memory and a non-volatile memory containing a data set, the non-volatile memory further containing a set of instruction codes,
- wherein the computing engine is powered by the energy source and executes instructions selected from the set of instruction codes, and
- wherein the computing engine performs an action selected from a list consisting of receiving data from the wireless data receiver and sending data to the wireless data transmitter in response to a stimulus from a control selected from the set of operator controls;
- a plurality of buffers, the buffers being external to the computing engine;
- a reset circuit coupled to the computing engine for initializing the computing engine;
- and
- a programming circuit coupled to the computing engine for writing to the data set in response to a signal from the computing engine and according to the contents of the plurality of buffers
- wherein the programming circuit holds the computing engine in a reset state for a duration exceeding about eight periods of the clock signals while data is being written to the data set.
12 more elements
Dependencies are inferred from the claim text.