Synchronous memory device having a temperature register
AssigneeRambus Inc.
InventorsBruno Werner Garlepp, Pak Shing Chau, Kevin S. Donnelly, Clemenz Portmann, Donald C. Stark, Stefanos Sidiropoulos, Richard M. Barth, Paul G. Davis, Ely K. Tsern
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Abstract
A synchronous dynamic random access memory device having an array of dynamic memory cells. The memory device includes input receiver circuitry to sample a value that is representative of a range of temperatures. In addition, the memory device includes a programmable register, coupled to the input receiver circuitry, to store the value that is representative of the range of temperatures.
Claims45
A synchronous dynamic random access memory device having an array of dynamic memory cells, wherein the memory device comprises:
- input receiver circuitry to sample an externally provided value that is representative of a range of temperatures;
- and
- a programmable register, coupled to the input receiver circuitry, to store the value that is representative of the range of temperatures.
A method of controlling a synchronous dynamic random access memory device by a memory controller, wherein the method comprises:
- in the memory controller, generating information indicative of a temperature range;
- and
- providing the information indicative of the temperature range to the memory device, wherein the memory device receives the information and stores the information in a register on the memory device.
A method of operation in a memory device that includes a plurality of memory cells, the method comprising:
- receiving, from a controller, a value which is representative of a range of temperatures;
- and
- storing the value in a programmable register on the memory device.
The method of 19, wherein the clock synchronization circuit is a phase lock loop circuit, wherein the phase lock loop circuit generates an internal clock signal having a predetermined timing relationship with an external clock signal.
An integrated circuit device having an array of memory cells, wherein the integrated circuit device comprises:
- a programmable register to store a value that is representative of a range of temperatures;
- and
- a clock synchronization circuit to receive an external clock signal and generate an internal clock signal, wherein the clock synchronization circuit is adjusted in accordance with the value stored in the programmable register, wherein the clock synchronization circuit includes:
- a phase detector to generate information representative of a difference in phase between the external clock signal and the internal clock signal;
- and
- a delay element to generate the internal clock signal, wherein an amount of delay of the delay element is varied based on the information representative of the difference in phase between the external clock signal and the internal clock signal;
- and
- output driver circuitry to output data in response to the internal clock signal.
An integrated circuit device having an array of memory cells, wherein the integrated circuit device comprises:
- a programmable register to store a value that is representative of the range of temperatures;
- and
- a clock synchronization circuit to receive an external clock signal and generate an internal clock signal, wherein the clock synchronization circuit is adjusted in accordance with the value stored in the programmable register, wherein the clock synchronization circuit includes:
- a phase detector to generate information representative of a difference in phase between the external clock signal and the internal clock signal;
- and
- an oscillator circuit, coupled to the phase detector, to generate the internal clock signal, wherein a phase of the internal clock signal is varied based on the information representative of the phase difference between the external clock signal and the internal clock signal;
- and
- output driver circuitry to output data in response to the internal clock signal.
A synchronous integrated circuit memory device having an array of dynamic memory cells, wherein the memory device comprises:
- transceiver circuitry including:
- a plurality of input receivers to receive an externally provided value that is representative of a range of temperatures;
- and
- a plurality of output drivers to transmit data;
- a locked loop circuit, coupled to the plurality of output drivers, to synchronize transmission of data from the memory device with an external clock signal;
- and
- a programmable register, coupled to the plurality of input receivers, to store the value that is representative of a range of temperatures.
Dependencies are inferred from the claim text.