Non-intrusive memory access for embedded processors
AssigneeHughes Electronics Corporation
InventorJeffrey J. Gold
Life of this patent
Estimating the term…
Abstract
A system for testing an embedded processor, such as an embedded processor for a spacecraft. The system comprises an Emulated Spacecraft Control Processor (ESCP) which contains the embedded processor, a simulation engine, and a host computer. The emulated spacecraft control processor includes a dual-port memory for emulating the memory for the embedded processor and data transfer logic which monitors cycles of the embedded processor to arbitrate access to the dual-port memory, the data transfer logic is operative to allow an access to the dual-port memory when the embedded processor performs an I/O cycle, wherein the access is performed before a subsequent machine cycle of the embedded processor.
Claims19
A system for testing an embedded processor, the system comprising:
- an emulated spacecraft control processor which contains the embedded processor, said emulated spacecraft control processor includes a dual-port memory for emulating the memory for the embedded processor and data transfer logic which monitors cycles of the embedded processor to arbitrate access to the dual-port memory, the data transfer logic is operative to allow an access to the dual-port memory when the embedded processor performs an I/O cycle, wherein the access is performed before a subsequent machine cycle of the embedded processor;
- a simulation engine which processes command data from the emulated spacecraft control processor to simulate system dynamics of the spacecraft in real-time, the simulation engine operative to produce the simulated sensor data for input to the emulated spacecraft control processor based on the simulated system dynamics;
- and
- a host computer which provides the command data and receives the telemetry data from the emulated spacecraft control processor.
A method of testing an embedded processor, the method comprising the steps of:
- providing an emulated spacecraft control processor comprising a dual-port memory, which emulates a memory for the embedded processor;
- receiving simulated sensor data and command data for the embedded processor using the emulated spacecraft control processor;
- monitoring cycles of the embedded processor to arbitrate access to the dual-port memory;
- allowing an access to the dual-port memory when the embedded processor performs an I/O cycle, wherein the access is performed before a subsequent machine cycle of the embedded processor.
An emulated spacecraft control processor comprising:
- a VMEbus interface;
- a processor bus;
- processor coupled to said processor bus;
- an embedded processor having an associated memory that is emulated by a dual-port memory of the spacecraft control processor;
- and
- data transfer logic which monitors cycles of the embedded processor to arbitrate access to the dual-port memory, the data transfer logic is operative to allow an access to the dual-port memory when the embedded processor performs an I/O cycle, wherein the access is performed before a subsequent machine cycle of the embedded processor.
Dependencies are inferred from the claim text.