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US 6,552,931 B2Granted
Low voltage flash EEPROM memory cell with improved data retention
AssigneeAgere Systems Inc.
InventorsRichard J. McPartland, Ranbir Singh
Life of this patent
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Abstract
The present invention provides memory circuit including a control input, a switch, and a voltage transfer structure including a linear capacitor that electrically couples the control input to the switch.
Claims16
A memory cell, comprising:
- a control input;
- a switch;
- and
- a voltage transfer structure including a linear capacitor that electrically couples the control input to the switch, wherein the linear capacitor has a capacitance substantially greater than a capacitance of the switch.
1 more element
An integrated circuit having a programable read-only-memory (PROM), comprising:
- transistors;
- memory cells with at least one of the memory cells including:
- a voltage transfer structure including a linear capacitor that electrically couples a control input to a switch, wherein the linear capacitor has a capacitance substantially greater than a capacitance of the switch;
- and
- interconnects that connect the transistors and the memory cells to form an operative integrated circuit.
2 more elements
Dependencies are inferred from the claim text.