Method and apparatus for power reduction in switched capacitor circuits

A method for power reduction in a switched capacitor circuit comprising:

• applying a full bias current level to an operational amplifier;
• monitoring a settling time of the operational amplifier at the inputs of the operational amplifier;
• determining if a voltage difference between the inputs is above a threshold;
• lowering the bias current level for the operational amplifier if the voltage difference between the inputs is below the threshold;
• repeating the monitoring, determining, and lowering until the voltage difference between the inputs is above the threshold;
• and
• setting the bias current level to a previous bias current level before the bias current level where the voltage difference between the inputs is above the threshold,
• wherein the power consumption of the operational amplifier is minimized while the settling time of the operational amplifier is still adequate for maximum performance.

A power reduction device for a switched capacitor circuit comprising:

• a counter, the counter monitoring output signals of a switched capacitor circuit;
• bias control logic, the bias control logic controlling a bias current level of at least one operational amplifier in the switched capacitor circuit;
• and
• a controller, the controller operatively connected to the counter and the bias control logic, the controller sending signals instructing the bias control logic to one of increase and decrease the bias level current to the at least one operational amplifier based on the accuracy of the monitored output signals,
• wherein the power consumption of the operational amplifier is minimized while maintaining maximum performance from the operational amplifier.

A method for power reduction in a switched capacitor circuit comprising:

• monitoring an output of the switched capacitor circuit;
• controlling a bias current level of at least one operational amplifier in the switched capacitor circuit;
• and
• one of increasing and decreasing the bias level current to the at least one operational amplifier based on the accuracy of the monitored output signal,
• wherein the power consumption of the operational amplifier is minimized while maintaining maximum performance from the operational amplifier.