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US 6,552,549 B1Granted
Method of reading electrical fuses/antifuses
AssigneeInfineon Technologies AG
InventorsRobert Kaiser, Jürgen Lindolf, Helmut Schneider
Life of this patent
Estimating the term…
Abstract
Electrical fuses/antifuses in a semiconductor memory configuration, such as in particular a DRAM, are read, instead of with the previously conventional internal voltage, with the voltage that defines the high potential of the bit lines of a memory cell array in the semiconductor memory. The high potential of the bit lines is defined by a voltage that is reduced relative to the internal voltage of the semiconductor memory.
Claims4
A method of reading electrical fuses/antifuses in a semiconductor memory configuration, which comprises:
- providing a semiconductor memory configuration with fuses/antifuses and with a memory cell array having bit lines, the semiconductor memory having a given internal voltage and a high potential of the bit lines defined by a reduced voltage, the reduced voltage being less than the given internal voltage and having a voltage level below the given internal voltage;
- and
- reading a state of a fuse/antifuse by applying the reduced voltage thereto.
Dependencies are inferred from the claim text.