Dummy layer diode structures for ESD protection

A device having a Dummy layer Zener-Like-Trigger (DZLT) structure for electrostatic discharge (ESD) protection, comprising:

• a semiconductor wafer with a p-substrate;
• said p-substrate implanted with diodes and n-channel transistors, where each of said n-channel transistors is associated with one of said diodes, said diodes called zener-like-diodes;
• said n-channel transistors and said diodes separated by shallow trench isolations (STI);
• each of said diodes comprised of an n+ and an overlapping p+ region, said overlapping p+ regions overlapping said n+ regions of said diodes;
• second p+ regions placed adjacent to each said overlapping p+ regions;
• a dummy polysilicon layer placed over of the channel separating of each of said second p+ and said overlapping p+ regions of said diodes;
• said dummy polysilicon layer creating a controllable trigger gate;
• said n+ region of said diode connected through conductive means to the gate of its associated n-channel transistor;
• said DZLT used as a first triggered device in electrostatic discharge (ESD) protection networks;
• said DZLT acting as a clamp between said gate and said source of said n-channel transistor for the protection of said gate of said n-channel transistor in an ESD event;
• said dummy polysilicon layer connected through a capacitor-couple circuit to a reference voltage;
• and
• said diodes going into a controllable voltage breakdown, during ESD stress at the input to said DZLT.