Offset-gate-type semiconductor device

A semiconductor device comprising:

• a first semiconductor region having a first conductivity type;
• a second semiconductor region formed on the first semiconductor region and having the first conductivity type and a resistance higher than the first semiconductor region;
• a conductive member arranged in a trench formed in the second semiconductor region and having a depth from a surface of the second semiconductor region to the first semiconductor region;
• a third semiconductor region formed in the surface of the second semiconductor region while being separated from the conductive member and having a second conductivity type;
• a fourth semiconductor region formed in the surface of the second semiconductor region in a region between the conductive member and the third semiconductor region and having the second conductivity type, said fourth semiconductor region being in contact with the conductive member and being separated from the third semiconductor region;
• and
• a gate structure formed on the fourth semiconductor region and on the second semiconductor region between the third and fourth semiconductor regions, said gate structure having one sidewall surface flush with a sidewall surface of the trench.