Semiconductor device and fabrication method thereof
AssigneeUnited Microelectronics Corp.
InventorsTomoyuki Uchiyama, Kazuhisa Sasaki, Taro Muraki
Life of this patent
Estimating the term…
Loading patent…
AssigneeUnited Microelectronics Corp.
InventorsTomoyuki Uchiyama, Kazuhisa Sasaki, Taro Muraki
Estimating the term…
A semiconductor device includes first and second conductive layers which are electrically connected to each other through a contact plug. A first insulating film is formed on the first conductive layer and has a first opening which reaches the surface of the first conductive layer. A second insulating film is formed on the first insulating film and has a second opening at the same position as the first opening. The contact plug is filled in the first and second openings and has the surface which is substantially flush with the surface of the second insulating film and also contains a metal having a high melting point. The second conductive layer is formed on the second insulating film and on the contact plug.
A method for fabricating a semiconductor device having first and second conductive layers electrically connected to each other through a contact plug, comprising the steps of:
A method for fabricating a semiconductor device having first and second conductive layers electrically connected to each other through a contact plug, comprising the steps of:
A method for fabricating a semiconductor device having first and second conductive layers electrically connected to each other through a contact plug, comprising the steps of:
Dependencies are inferred from the claim text.
Drawings are temporarily unavailable. Open the PDF at USPTO
From the US filing history. Foreign family members aren’t listed.
By forming openings in the dielectric parts: for dual-damascene structures
Of conductive barrier, adhesion or liner layers: in openings in dielectrics
In openings in dielectrics: bottomless barrier, adhesion or liner layers
Of conductive parts of the interconnections: by filling conductive material into holes, grooves or trenches
Term ended 16 Mar 2018 (estimated)
1. Field of the Invention
The present invention relates to a semiconductor device and a method for fabricating a semiconductor device, and more particularly, to a semiconductor device having a multilevel interconnection layer and a method for fabricating such a semiconductor device.
2. Description of the Related Art
FIG. 1 is a cross-sectional view of a structure of a MOS transistor as a semiconductor device in accordance with a first embodiment of the present invention;
FIGS. 2A to 2C show cross-sectional views for explaining former steps in a method for fabricating the MOS transistor shown in FIG. 1;
FIGS. 3A to 3C show cross-sectional views for explaining latter,steps in the method for fabricating the MOS transistor of FIG. 1;
A semiconductor device in accordance with a first embodiment of the present invention is a MOS transistor having a multilevel interconnection layer, which includes, as shown in FIG. 1, a P-type silicon semiconductor substrate 1; a field oxidation film 3 for defining an element formation region 2; a gate oxidation film 4 formed on the silicon semiconductor substrate 1; a gate electrode 5 formed on the gate oxidation film 4; a P-type impurity layer 6 formed in the silicon semiconductor substrate 1 below the gate oxidation film 4; N-type impurity diffusion layers 7 (first conductive layers) formed at both sides of the P-type impurity layer 6 in the silicon semiconductor substrate 1; an interlevel insulating film 8 formed on the entire surface of the silicon semiconductor substrate 1 and having first contact holes 111 on the impurity diffusion layers 7, respectively; a silicon nitride film 9 formed on the interlevel insulating film 8 and having second contact holes 112 on the first contact holes 111, respectively; underlying conductive films 12 each of which is formed on the side and bottom faces of the first contact hole 111 and on the side faces of the second contact hole 112 and is a TiW film, a double-layered film of Ti and TiN layers, a double-layered film of Ti and TiW layers or the like; tungsten plugs 14 each of which has the surface substantially flush with the surface of the silicon nitride film 9 and is buried into the first and second contact holes 111 and 112, and wiring layers 15 (second conductive layers) of aluminum alloy or the like each of which is formed on the silicon nitride film 9 to be electrically connected to the tungsten plug 14. The silicon nitride film 9 functions as a stopper film when the tungsten plugs 14 are formed by a chemical mechanical polishing (CMP) process. The first and second contact holes 111 and 112, the underlying conductive film 12, the tungsten plug 14 and the wiring layer 15 are formed on each of the two impurity diffusion layers 7.
In the semiconductor device of the present embodiment having such a structure, the tungsten plug 14 can be formed by the chemical mechanical polishing (CMP) process using the silicon nitride film 9 as the stopper film, so that the surface of the tungsten plug 14 can be substantially flush with the surface of the silicon nitride film 9. As a result, the wiring layer 15 can be prevented from being broken to improve the reliability of the semiconductor device (MOS transistor). Further, as the tungsten plug 14 is used, the parasitic resistance and capacitance within the opening can be reduced. In addition, the tungsten plug 14 is buried in the first and second contact holes 111, 112 through the underlying conductive film 12 which is TiW film, a double-layered film of Ti and TiN layers, a double-layered film of Ti and TiW layers or the like, so that it is possible to improve the adhesion of the tungsten plug 14.
When it is unnecessary to take the parasitic resistance and capacitance within the opening into consideration too much, the tungsten plug 14 may be replaced by an aluminum plug including aluminum. Further, when it is unnecessary to take the adhesion of the tungsten plug 14 into account too much, the tungsten plug 14 may be formed without any intervention of the underlying conductive film 12.