Stacked capacitor-type semiconductor storage device and manufacturing method thereof
AssigneeKabushiki Kaisha Toshiba
InventorsYusuke Kohyama, Takashi Ohsawa, Shizuo Sawada
Life of this patent
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Abstract
First and second wirings are formed on a first insulating film. Each of the wirings is arranged so that a conductive film, a silicon oxide film and a silicon nitride film are laminated. Thereafter, a silicon oxide insulating film on the whole surface. The silicon oxide insulating film is etched so that a contact hole is formed between the first and second wirings. Since the silicon oxide film and the silicon nitride film exist on the conductive film of each wiring, the conductive film is not exposed at the time of etching. Thereafter, an insulating film is formed on a side wall of the contact hole, and the conductive film exposed through the contact hole is covered by the insulating film.
Claims20
A method of manufacturing a semiconductor storage device comprising the steps of:
- forming a first insulating film on a semiconductor substrate;
- forming a conductive film on said first insulating film;
- forming a protective film on said conductive film;
- etching said protective film and said conductive film locally and forming first and second wirings;
- forming a second insulating film between said first and second wirings;
- etching said second insulating film and said first insulating film locally by using said protective film as a mask and forming a contact hole between said first and second wirings;
- and
- forming a third insulating film at least on a side wall of said conductive film and on a side wall of said first insulating film in said contact hole, wherein said third insulating film is in physical contact with the side walls of said conductive film and said first insulating film in said contact hole.
A method of manufacturing a semiconductor storage device comprising the steps of:
- forming an element separation insulating film on a semiconductor substrate, for dividing an element region;
- forming a gate electrode on the element region divided by said element separation insulating film, connected to a gate insulating film and a word line, and an MOS transistor having source/drain regions;
- forming a first insulating film for covering said MOS transistor and said element separation insulating film;
- etching said first insulating film locally and forming a first contact hole reaching a first source/drain region of said MOS transistor and a second contact hole reaching a second source/drain region of said MOS transistor, said first contact hole being formed on the element region and on said element separation insulating film, and said second contact hole being formed on the element region, said first and second contact holes being self-aligned with said gate electrode;
- forming first and second conductive plugs for filling up said first and second contact holes;
- forming a second insulating film for covering said first insulating film and said first and second conductive plugs;
- etching said second insulating film locally and forming a bit line contact reaching said first conductive plug on said element separation insulating film;
- forming a bit line, having a lower section composed of a conductive film and an upper section composed of a third insulating film, on said second insulating film and said bit line contact;
- forming a fourth insulating film on said second insulating film and said bit line;
- etching said fourth insulating film and said second insulating film locally by using said third insulating film as a mask and forming a storage node contact reaching said second conductive plug so that said storage node contact is self-aligned with said bit line;
- forming a fifth insulating film on a side wall of the conductive film of said bit line and a side wall of said second insulating film in said storage node contact;
- and
- forming a storage node electrode, a capacitor insulating film on said storage node electrode and a plate electrode on said capacitor insulating film in this order so as to from a capacitor, said storage node electrode connected to said second conductive plug and electrically separated from the conductive film of said bit line by said fifth insulating film.
A method of manufacturing a semiconductor device comprising the steps of:
- forming a first insulating layer on a semiconductor substrate;
- forming first and second wirings on said first insulating layer at a predetermined interval, said first and second wirings including a conductive film and a first insulating film on said conductive film;
- forming a second insulating film on said first insulating layer;
- forming a line/space pattern on said second insulating film, said line/space pattern being intersected perpendicularly to said first and second wirings;
- and
- forming a contact hole in said first insulating layer and said second insulating film located between said first and second wirings, wherein said contact hole is defined by said line/space pattern and said first and second wirings.
A method of manufacturing a semiconductor device comprising the steps of:
- forming first and second conductive films at a predetermined interval on a first insulating film;
- forming a second insulating film on said first conductive film;
- forming a line/space pattern on said second insulating film, said line/space pattern being intersected perpendicularly to said first and second conductive films;
- and
- forming a contact hole in said first and second insulating films located between said first and second conductive films, wherein said contact hole is defined by a line/space pattern and said first and second conductive films.
A method of manufacturing a semiconductor device comprising the steps of:
- forming first and second conductive films at a predetermined interval on a first insulating film;
- forming a second insulating film on said first conductive film;
- forming a line/space pattern on said second insulating film, said line/space pattern being intersected perpendicularly to said first and second conductive films;
- and
- forming a contact hole in said first and second insulating films by etching said first and second insulating films using said line/space pattern and said first and second conductive films as a mask.
A method of manufacturing a semiconductor device comprising the steps of:
- forming a transistor on a surface of a semiconductor substrate, said transistor having a gate electrode and a source/drain region;
- forming a first insulating film covering said transistor;
- forming first and second contact holes in said first insulating film, said first contact hole exposing a first region of said source/drain region, said second contact hole exposing a second region of said source/drain region;
- forming first and second conductive films in said first and second contact holes, respectively;
- forming a second insulating film on said first insulating film;
- forming a third contact hole in said second insulating film, said third contact hole exposing said first conductive film;
- forming a third conductive film in said third contact hole;
- forming a bit line on said second insulating film, said bit line including a fourth conductive film connected to said third conductive film and a third insulating film on said fourth conductive film, and said bit line being located so as to intersect perpendicularly to a word line connected to said gate electrode;
- forming a fourth insulating film on said second insulating film;
- forming a line/space pattern on said fourth insulating film which intersects perpendicularly to said bit line;
- forming a fourth contact hole in said second insulating film using said line/space pattern and said bit line as a mask, said fourth contact hole exposing said second conductive film;
- forming a fifth conductive film in said fourth contact hole;
- and
- forming a capacitor above said bit line, said capacitor being connected to said fifth conductive film.
A method of manufacturing a semiconductor device comprising the steps of:
- forming an element separation insulating film in a semiconductor substrate for dividing an element region;
- forming a transistor in said element region, said transistor having a gate insulating film, a gate electrode connected to a word line and a source/drain region;
- forming a first insulating film, said first insulating film covering said element separation insulating film and said transistor;
- forming a first contact hole in said first insulating film, said first contact hole reaching a first region of said source/drain region of said transistor;
- forming a second contact hole in said first insulating film, said second contact hole reaching a second region of said source/drain region of said transistor;
- forming a first conductive plug for filling up said first contact hole;
- forming a second conductive plug for filling up said second contact hole;
- forming a second insulating film, said second insulating film covering said first insulating film and said first and second conductive plugs;
- forming a bit line contact in said second insulating film, said bit line contact reaching said first conductive plug;
- forming a bit line in said second insulating film and said bit line contact, a lower part of said bit line including a conductive film and an upper part including a third insulating film;
- forming a fourth insulating film on said second insulating film and said bit line;
- forming a contact hole for a storage node on a side of said bit line and through said fourth insulating film and said second insulating film, said contact hole reaching said second conductive plug;
- forming a fifth insulating film at least on a side wall of said conductive film and a side wall of said second insulating film on said bit line exposed from said contact hole;
- and
- forming a capacitor having a storage node, a plate electrode above said storage node and a capacitor insulating film formed therebetween, said storage node being electrically separated from said conductive film by said fifth insulating film and connected to said second conductive plug via said contact hole,
- wherein said contact hole for said storage node is defined by a line/space pattern which intersects perpendicularly to said bit line.
A method of manufacturing a semiconductor device comprising the steps of:
- forming an element separation insulating film on a semiconductor substrate for dividing element regions;
- forming a plurality of transistors in said element regions, said transistors respectively having a gate insulating film, a gate electrode connected to a word line and a source/drain region;
- forming a first insulating film, said first insulating film covering said element separation insulating film and said transistors;
- forming first contact holes in said first insulating film, said first contact holes reaching first regions of said source/drain regions of said transistors;
- forming second contact holes in said first insulating film, said second contact holes reaching second regions of said source/drain regions of said transistors;
- forming a first conductive plug for filling up said respective first contact holes;
- forming a second conductive plug for filling up said respective second contact holes;
- forming a second conductive plug for filling up said respective second contact holes;
- forming a second insulating film, said second insulating film covering said first insulating film and said first and second conductive plugs;
- forming a bit line contact in said second insulating film, said bit line contact reaching said respective first conductive plugs;
- forming bit lines respectively on said second insulating film and said bit line contact, a lower part of said bit lines including a conductive film and an upper part including said third insulating film;
- forming a fourth insulating film on said second insulating film and said bit line;
- forming a contact hole for a storage node between said bit lines and through said fourth insulating film and said second insulating film, said contact hole reaching said second conductive plug;
- forming a fifth insulating film at least on a side wall of said conductive film and a side wall of said second insulating film on said bit line exposed from said contact hole;
- and
- forming a capacitor, said capacitor having a storage node, a plate electrode above said storage node and a capacitor insulating film formed therebetween, said storage node being electrically separated from said conductive film by said fifth insulating film and connected to said second conductive plug via said contact hole,
- wherein said contact hole for said storage node is defined by a line/space pattern which intersects perpendicularly to said bit line.
Dependencies are inferred from the claim text.