Process of manufacturing a dual gate CMOS transistor
AssigneeSharp Kabushiki Kaisha
InventorYoshiji Takamura
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Abstract
A process of manufacturing a semiconductor device having a dual gate CMOS transistor in which an nMOS transistor in the dual gate CMOS transistor is formed by the steps of: (a) forming a gate insulating film and a silicon film on a semiconductor substrate; (b) implanting n-type impurities into the silicon film in an nMOS region of the semiconductor substrate; (c) forming a conductive film on the silicon film; and (d) patterning the silicon film and the conductive film into a gate electrode.
Claims18
A process of manufacturing a semiconductor device having a dual gate CMOS transistor in which an nMOS transistor in the dual gate CMOS transistor is formed by a process comprising:
- (a) forming a gate insulating film and a film comprising silicon on a semiconductor substrate;
- (b) implanting n-type impurities into the film comprising silicon in an nMOS region of the semiconductor substrate;
- (c) after implanting the n-type impurities into the film comprising silicon, forming a conductive film on the film comprising silicon;
- and
- (d) patterning the film comprising silicon with the n-type impurities therein and the conductive film into a gate electrode.
A process of manufacturing a semiconductor device having a dual gate CMOS transistor in which an nMOS transistor in the dual gate CMOS transistor is formed by a process comprising:
- (a) forming a gate insulating film and a silicon film on a semiconductor substrate;
- (b) implanting n-type impurities into the silicon film in an nMOS region of the semiconductor substrate;
- (c) forming a conductive film on the silicon film;
- (d) patterning the silicon film and the conductive film into a gate electrode;
- and
- wherein in the step (b) the n-type impurities are implanted into the silicon film with a mask having an opening above the nMOS region, and p-type impurities are further implanted into the semiconductor substrate through the gate insulating film and the silicon film using the same mask before or after the n-type impurity implantation.
A process of manufacturing a semiconductor device having a dual gate CMOS transistor, the method comprising:
- (a) forming a gate insulating film and a silicon film on a semiconductor substrate;
- (b′) implanting n-type impurities into the silicon film in an nMOS region and p-type impurities into the silicon film in an pMOS region of the semiconductor substrate;
- (c) after implanting the n-type impurities into the silicon film, forming a conductive film on the silicon film;
- and
- (d′) patterning the silicon film and the conductive film into gate electrodes for the nMOS and pMOS transistor.
A process of manufacturing a semiconductor device having a dual gate CMOS transistor, the process comprising:
- (a) forming a gate insulating film and a silicon film on a semiconductor substrate;
- (b′) implanting n-type impurities into the silicon film in an nMOS region and p-type impurities into the silicon film in a pMOS region of the semiconductor substrate;
- (c) forming a conductive film on the silicon film;
- (d′) patterning the silicon film and the conductive film into gate electrodes for the nMOS and pMOS transistor;
- and
- wherein in the step (b′) the n-type impurities are implanted into the silicon film with a mask having an opening only above the nMOS region, and p-type impurities are further implanted into the semiconductor substrate through the gate insulating film and the silicon film using the same mask before or after the n-type impurity implantation.
Dependencies are inferred from the claim text.