Vertical power component manufacturing method
AssigneeSTMicroelectronics S.r.l.
InventorsGérard Auriel, Laurent Cornibert
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Abstract
A method for manufacturing a vertical power component on a silicon wafer, including the steps of growing a lightly-doped epitaxial layer of a second conductivity type on the upper surface of a heavily-doped substrate of a first conductivity type, the epitaxial layer having a thickness adapted to withstanding the maximum voltage likely to be applied to the power component during its operation; and delimiting in the wafer an area corresponding to at least one power component by an isolating wall formed by etching a trench through the epitaxial layer and diffusing from this trench a dopant of the first conductivity type of high doping level.
Claims4
A method for manufacturing a vertical power component on a silicon wafer, comprising the steps of:
- growing a lightly-doped epitaxial layer of a second conductivity type on an upper surface of a heavily-doped substrate of a first conductivity type, the lightly-doped epitaxial layer having a thickness sufficient to withstand a maximum voltage applied to the vertical power component during its operation;
- and
- delimiting on the silicon wafer an area corresponding to at least one vertical power component by forming an isolating wall by etching a trench through the lightly-doped epitaxial layer, and diffusing from this trench a dopant of the first conductivity type of a high doping level to form the isolating wall.
Dependencies are inferred from the claim text.