Method for forming a flip chip on leadframe semiconductor package

A method for forming a flip chip semiconductor package, the method comprising the steps of:

• a) providing a patterned layer of metal conductors having a first surface;
• b) providing a semiconductor die having a first surface with a pattern of pads thereon, the pads having non-reflowable material thereon, wherein the pattern of pads is different from the patterned layer of metal conductors, and wherein the non-reflowable material melts at a temperature that is higher than a predetermined reflow temperature;
• c) disposing a predetermined amount of reflowable conductive material on free-ends of the non-reflowable material on each of the pads, wherein the reflowable conductive material melts at the predetermined reflow temperature;
• d) placing the semiconductor die on the first surface of the patterned layer of metal conductors, wherein the reflowable conductive material on the non-reflowable material on each of the pads abut the patterned layer of metal conductors to form a pattern of interconnect locations on the patterned layer of metal conductors, and wherein the pattern of interconnect locations correspond with the pattern of pads;
• and
• e) reflowing the reflowable conductive material at the predetermined reflow temperature, wherein a substantial portion of the reflowable conductive material on the non-reflowable material on the each of the pads remains substantially at the respective interconnect locations to form conductive interconnects between the non-reflowable material and the interconnect locations.