Semaphore access in a multiprocessor system
AssigneeInfineon Technologies North America Corp.
InventorAxel K. Kloth
Life of this patent
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Abstract
Access control to protected resources in a multiprocessor system is implemented without additional use of the processor bus. A bridge interconnects each processor with shared resources. The bridge has a semaphore corresponding to each protected resource indicating if the corresponding resource is available. The bridge halts a processor requesting access to any resource having a corresponding semaphore indicating the requested resource is not available.
Claims19
A multiprocessor system comprising:
- at least one protected resource;
- a plurality of processors, each processor operative to generate requests to access the at least one protected resource;
- and
- a bridge in communication with each processor through a first bus and the at least one protected resource through a second bus, the bridge having a semaphore corresponding to each of the at least one protected resource indicating if the corresponding resource is available, the bridge operative to halt a processor requesting access to any resource having a corresponding semaphore indicating the requested resource is not available.
A multiprocessor system comprising:
- at least one protected resource;
- a plurality of processors, each processor operative to generate requests to access the at least one protected resource;
- and
- a bridge in communication with each processor and the at least one protected resource, the bridge having a semaphore corresponding to each of the at least one protected resource indicating if the corresponding resource is available, the bridge operative to halt a processor requesting access to any resource having a corresponding semaphore indicating the requested resource is not available
- wherein the at least one protected resource comprises a plurality of memory arrays, access to any element of a memory array determined by the semaphore corresponding to the memory array.
A method of controlling access to at least one protected resource in a multiprocessor system comprising:
- receiving a request from a processor, in a bridge, to access a protected resource;
- examining the state of a semaphore in the bridge corresponding to the protected resource, the semaphore state indicating availability of the protected resource;
- if the semaphore indicates that the resource is available, granting the requesting processor access to the protected resource;
- and
- if the semaphore indicates that the resource is unavailable, halting the requesting processor
- wherein a first bus interconnects the bridge and the processor and a second bus interconnects the bridge and the protected resource.
A method of controlling access to at least one protected resource in a multiprocessor system comprising:
- receiving a request from a processor to access a protected resource;
- examining the state of a semaphore corresponding to the protected resource, the semaphore state indicating availability of the protected resource;
- if the semaphore indicates that the resource is available, granting the requesting processor access to the protected resource;
- if the semaphore indicates that the resource is unavailable, halting the requesting processor;
- receiving a resource release from a processor granted access to the protected resource;
- determining if a processor is halted waiting for the released resource;
- and
- if a processor is halted, resuming execution by the halted processor.
A bridge for interconnecting a plurality of processors to at least one protected resource, the bridge comprising a semaphore corresponding to each of the at least one protected resource indicating if the corresponding resource is available, the bridge operative to halt a processor requesting access to any resource having a corresponding semaphore indicating the requested resource is not available and the bridge being interconnected to the plurality of processors by at least one processor bus and to the at least one protected resource by at least one resource bus.
A bridge for interconnecting a plurality of processors to at least one protected resource, the bridge comprising a semaphore corresponding to each of the at least one protected resource indicating if the corresponding resource is available, the bridge operative to halt a processor requesting access to any resource having a corresponding semaphore indicating the requested resource is not available
- wherein the at least one protected resource comprises a plurality of memory arrays, access to any element of a memory array determined by the semaphore corresponding to the memory array.
A multiprocessor system comprising:
- at least one protected resource;
- a plurality of processors, each processor operative to generate requests to access the at least one protected resource;
- and
- a bridge in communication with each processor through a first bus and the at least one protected resource through a second bus, the bridge having a semaphore corresponding to each of the at least one protected resource indicating if the corresponding resource is available, the bridge operative to transmit a signal to halt a processor requesting access to any resource having a corresponding semaphore indicating the requested resource is not available.
A method of controlling access to at least one protected resource in a multiprocessor system comprising:
- receiving a request from a processor to access a protected resource;
- examining the state of a semaphore corresponding to the protected resource, the semaphore state indicating availability of the protected resource;
- if the semaphore indicates that the resource is available, granting the requesting processor access to the protected resource;
- and
- if the semaphore indicates that the resource is unavailable, transmitting a signal to halt the requesting processor.
Dependencies are inferred from the claim text.