US 6,549,764 B2Granted

Method and apparatus for selecting capacitance amounts to vary the output frequency of a controlled oscillator

AssigneeSilicon Laboratories Inc.

InventorDavid R. Welland

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Abstract

A method and apparatus for synthesizing high-frequency signals is disclosed that overcomes integration problem associated with prior implementations while meeting demanding phase noise and other impurity requirements. In one embodiment, a phase-locked loop (PLL) frequency synthesizer is disclosed having a voltage controlled oscillator (VCO) with a variable capacitance that includes a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance, and the continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance. In a further detail, a plurality of connected capacitor circuits for the discretely variable capacitance are disclosed each having a first switch that selectively couples a capacitor between two nodes. A multiple-bit digital control signal is also disclosed that couples to the control nodes of the plurality of switches to select an overall capacitance for the discretely variable capacitance circuit, with at least two of the capacitors have different capacitance values with respect to each other.

Claims40

Dependent claims

A controlled oscillator having an output frequency dependent upon a variable capacitance amount, comprising:

a first variable capacitance circuit integrated within the controlled oscillator including a plurality of first capacitor circuits, the first capacitor circuits comprising:
a plurality of first capacitors;
and
a plurality of first control circuits having a plurality of first control nodes;
each first capacitor circuit comprising at least one of the first capacitors and at least one of the first control circuits;
a multiple-bit digital control signal coupled to the first control nodes to include or exclude the first capacitors within an overall capacitance for the first variable capacitance circuit, the multiple-bit digital control signal being configured to be adjusted depending upon the output frequency;
a second variable capacitance circuit integrated within the controlled oscillator including a plurality of second capacitor circuits, the second capacitor circuits comprising:
a plurality of second capacitors;
and
a plurality of second control circuits having a plurality of second control nodes;
each second capacitor circuit comprising at least one of the second capacitors and at least one of the second control circuits;
and
a plurality of analog control signals coupled to the second control nodes to vary the capacitance amount contributed by the second capacitor circuits to an overall capacitance for the second variable capacitance circuit, the plurality of analog control signals being configured to provide to the control nodes at least one signal level between a high signal level and a low signal level, and the plurality of analog control signals being configured to be adjusted depending upon the output frequency.

10 more elements

A method for controlling an oscillator having an output frequency dependent upon a variable capacitance, comprising:

providing a first variable capacitance circuit integrated within the controlled oscillator including a plurality of first capacitor circuits, the first capacitor circuits comprising:
a plurality of first capacitors;
and
a plurality of first control circuits having a plurality of first control nodes;
each first capacitor circuit comprising at least one of the first capacitors and at least one of the first control circuits;
providing a second variable capacitance circuit integrated within the controlled oscillator including a plurality of second capacitor circuits, the second capacitor circuits comprising:
a plurality of second capacitors;
and
a plurality of second control circuits having a plurality of second control nodes;
each second capacitor circuit comprising at least one of the second capacitors and at least one of the second control circuits;
applying a multiple-bit digital control signal to the first control nodes to include or exclude the first capacitors within an overall capacitance for the first variable capacitance circuit, the multiple-bit digital control signal being adjusted depending upon the output frequency;
and
applying a plurality of variable control signals to the second control nodes to vary the capacitance amount contributed by the second capacitor circuits to an overall capacitance for the second variable capacitance circuit, the plurality of analog control signals being configured to provide to the control nodes at least one signal level between a high signal level and a low signal level, and the plurality of analog control signals being adjusted depending upon the output frequency.

10 more elements

Dependencies are inferred from the claim text.

Facts

Application: 09/845,812Filed 30 Apr 2001 · continuation
Priority: 29 May 1998
Published: US 2001/0024943 A127 Sep 2001
Granted: 15 Apr 2003
Term ends: Not estimatedThe source records don’t support an estimate.

Classification6 codes

H03L 7/091
Concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal: the phase or…
H03L 7/07
Using a reference signal applied to a frequency- or phase-locked loop: using several loops, e.g. for redundant clock signal generation
H03L 7/099
Details of the phase-locked loop: concerning mainly the controlled oscillator of the loop
H03L 7/18
Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop:…