System and method for a fast hardware implementation of RC4
AssigneeCompaq Computer Corporation
InventorDonald P. Matthews, Jr.
Life of this patent
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Abstract
The system and method of the present invention facilitates encrypting and decrypting files using a fast hardware implementation of the RC4 method to enable secure access to information resources in a computer network. The network system includes a sender computer coupled via a computer network to a receiver computer. The RC4 algorithm as implemented in hardware and its associated multiport memory (included within both the sender computer and the receiver computer) enables a fast hardware implementation of the respective encryption circuit and decryption circuit. Multi-port memory allows for at either computer site a fast hardware implementation of the RC4 encryption/decryption method where reads and writes are synchronously performed.
Claims15
A system for applying an RC4 cipher technique, comprising:
- a message receiver for receiving a message;
- a key computation module for computing a key according to the RC4 cipher technique, where the key computation module includes at least one multiport memory that allows for a synchronous read and write;
- and
- an XOR module coupled to the message receiver and to the key computation module for performing an XOR function of the message and the key to yield an encrypted message.
A method for applying an RC4 cipher technique using a circuit which includes at least one dual port memory, the method performed by the circuit to encrypt a message comprising the steps of:
- (a) incrementing a value “i”;
- (b) loading a value Si from the at least one dual port memory allowing for synchronous read and write;
- (c) simultaneously with step (b) adding the value Si to a value “j”;
- (d) loading a value Sj from the at least one dual port memory;
- (e) simultaneously with step (d) adding the value Sj to the value Si to generate a value “t” and storing the value Si into the value Sj;
- (f) reading a value “k” by loading a value St;
- (g) simultaneously with step (f) storing the value Sj into the value Si and incrementing the value “i”;
- and
- (h) performing an XOR function of a portion of the message and the value “k” to encrypt the portion of the message.
A method for applying an RC4 cipher technique using a circuit which includes at least two dual port memories, the method performed by the circuit to encrypt a message comprising the steps of:
- (a) incrementing a value “i”;
- (b) loading a value Si from at least one of the at least two dual port memories allowing for synchronous read and write;
- (c) simultaneously with step (b) adding the value Si to a value “j”;
- (d) loading a value Sj from at least one of the at least two dual port memories;
- (e) simultaneously with step (d) adding the value Sj to a value Si to generate a value “t”, storing the value of Si into the value Sj, and incrementing the value “i”;
- (f) reading a value “k” by loading a value St from a second of the at least two dual port memories,
- (g) simultaneously with step (f) loading the value Si, adding the value Si to the value “j”, storing the value Sj of step (d) into the value Si of step (b);
- and
- (h) performing an XOR function of a portion of the message and the value “k” to encrypt the portion of the message.
A key computation module in a system for encryption or decryption according to the RC4 algorithm, comprising:
- a control logic coupled to receive a request for a key and to transmit the key, configured to compute the key according to the RC4 algorithm, wherein the control logic is configured to read s-values from an at least one multiport memory, calculate new s-values, and write the new s-values to the at least one multiport memory in a single cycle;
- and
- the at least one multiport memory coupled to the control logic, configured to read the s-values and write the new s-values in a single cycle.
A method of computing a key for encryption or decryption according to the RC4 algorithm, comprising the steps of:
- receiving a request for a key;
- computing a key according to the RC4 algorithm, the RC4 algorithm performed by reading s-values from an at least one multiport memory, calculating new s-values, and writing the new s-values to the at least one multiport memory in a single cycle;
- and
- transmitting the key.
A method for applying an RC4 cipher technique using a circuit which includes at least one dual port memory, the method performed by the circuit to encrypt a message comprising the steps of:
- (a) incrementing a value “i”;
- (b) loading a value Si from the at least one dual port memory allowing for synchronous read and write;
- (c) simultaneously with step (b) adding the value Si to a value “j”;
- (d) loading a value Sj from the at least one dual port memory;
- (e) simultaneously with step (d) adding the value Sj to the value Si to generate a value “t” and storing the value Si into the value Sj;
- (f) reading a value “k” by loading a value St;
- (g) simultaneously with step (f) storing the value Sj into the value Si and incrementing the value “i”;
- and
- (h) performing an XOR function on the message and the value “k” to encrypt the message.
Dependencies are inferred from the claim text.