Limiting loss in a circuit
AssigneeHewlett-Packard Development Company, L.P.
InventorsSamuel D. Naffziger, Don Douglas Josephson
Life of this patent
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AssigneeHewlett-Packard Development Company, L.P.
InventorsSamuel D. Naffziger, Don Douglas Josephson
Estimating the term…
A circuit for limiting loss in a second circuit. The circuit may include a first timer, a second timer and one or more logic gates. The first timer may produce a first output in a given state if the duration of a pulse for use with the second circuit reaches a first predetermined amount of time, where the first predetermined amount of time is related to a parameter of the second circuit. The second timer may produce a second output in the given state if the first timer does not produce the first output in the given state when the duration of the pulse reaches a second predetermined amount of time. The one or more logic gates may have an output that is the same as the pulse unless and until the output of the first timer or the second timer is in the given state, at which time, the output of the one or more logic gates is forced to a non-pulsed state.
A circuit for limiting loss in a second circuit, the circuit comprising:
A method for use with a circuit in which leakage can occur at a first rate, the method comprising:
A means for use with a circuit in which leakage can occur at a first rate, the means comprising:
Dependencies are inferred from the claim text.