Circuit for generating an ATD pulse signal independent of voltage and temperature variations
AssigneeSTMicroelectronics S.r.l.
InventorsMassimo Scardaci, Ignazio Martines
Life of this patent
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Abstract
A circuit for generating a constant pulse signal from an enabling ATD input signal may include a latch structure connected between first and second circuit nodes, with each node being coupled to a corresponding charge and discharge capacitance and being also connected to respective inputs of a logic gate. The circuit may also include a memory element coupled to the circuit nodes for filtering the enabling ATD signal and avoiding a partial discharge of one of the capacitances. An output of the logic gate is provided for generating the pulse signal independent of voltage and/or temperature variations affecting the enabling ATD signal.
Claims29
A circuit for generating a pulse signal independent of at least one of voltage and temperature variations and comprising:
- a pair of symmetric circuit portions including first and second nodes;
- a latch connected between the first and second nodes;
- a corresponding charge and discharge capacitance connected to each of the first and second nodes;
- at least one logic gate having inputs connected to the first and second nodes and having an output generating the pulse signal based upon receipt of an enabling ATD signal;
- and
- a memory element connected to the first and second nodes for filtering the enabling ATD signal thus avoiding a partial discharge of at least one of the capacitances.
A circuit for generating a pulse signal independent of at least one of voltage and temperature variations and comprising:
- first and second nodes and a latch connected therebetween;
- a respective capacitance connected to each of the first and second nodes;
- at least one logic gate having respective inputs connected to the first and second nodes and having an input receiving an enabling ATD signal, said at least one logic gate having an output generating the pulse signal based upon receipt of the enabling ATD signal;
- and
- a memory element coupled to the first and second nodes for filtering the enabling ATD signal.
A memory device comprising:
- first and second nodes and a latch connected therebetween;
- a respective capacitance connected to each of the first and second nodes;
- at least one logic gate having respective inputs connected to the first and second nodes and having an input receiving an enabling ATD signal, said at least one logic gate having an output generating the pulse signal based upon receipt of the enabling ATD signal;
- and
- a memory element coupled to the first and second nodes for filtering the enabling ATD signal.
A method for generating a pulse signal independent of at least one of voltage and temperature variations and comprising:
- connecting a latch between first and second circuit nodes, with each node being coupled to a corresponding charge and discharge capacitance and being also connected to respective inputs of at least one logic gate;
- and
- filtering the enabling ATD signal and avoiding a partial capacitance discharge so that an output of the logic gate provides the pulse signal independent of at least one of voltage and temperature variations affecting the enabling ATD signal.
Dependencies are inferred from the claim text.