Driving circuits for a memory cell array in a NAND-type flash memory device
AssigneeSamsung Electronics Co., Ltd.
InventorsJung Hoon Park, Suk Cheon Kwon, Young Ho Lim
Life of this patent
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Abstract
A NAND flash memory device includes: a plurality of memory cell array units, each memory cell unit having a plurality of memory strings, each memory string having a string selection line, a ground selection line, and a plurality of wordlines; a plurality of source lines divisionally arranged in the memory cell array units and connected to the memory strings in one of the memory cell array units; and a plurality of drivers arranged in correspondence with the memory cell array units, each driver operating the string selection line, the ground selection line, the wordlines, and the source line which belong to each of the memory cell array units.
Claims20
A NAND flash memory device comprising:
- a plurality of memory cell array units, each memory cell array unit having a plurality of memory strings, each memory string having a string selection line, a ground selection line, and a plurality of wordlines;
- a plurality of source lines divisionally arranged in the memory cell array units and each connected to the memory strings in one of the memory cell array units;
- and
- a plurality of drivers arranged in correspondence with the memory cell array units, each driver operating the string selection lines, the ground selection lines, the wordlines, and the source line which belong to each of the memory cell array units.
A memory device, comprising:
- a plurality of memory cells array units, each memory cell array unit including a plurality of memory strings, each of said memory strings being connected to a corresponding plurality of wordlines, and further being connected to a corresponding string selection line and a corresponding ground selection line for selecting the memory string;
- and
- a plurality of source lines each corresponding to and connected to one of the plurality of memory cell array units, said source lines capable of being independently driven from one another.
A memory device, comprising:
- a plurality of memory cells array units, each memory cell array unit including a plurality of memory strings, each of said memory strings being connected to a corresponding plurality of wordlines, and further being connected to a corresponding string selection line and a corresponding ground selection line for selecting the memory string;
- a plurality of source lines each corresponding to and connected to one of plurality of memory cell array units, said source lines capable of being independently driven from one another;
- and
- a plurality of drivers each corresponding to one of the plurality of memory cell array units, each of said drivers being connected to and driving the string selection lines, the ground selection lines, and the wordlines of the corresponding memory cell array unit,
- wherein each of said drivers further comprises a plurality of driver portions, each driver portion corresponding to one of the plurality of memory strings of the corresponding memory cell array unit and being connected to and driving the string selection line, the ground line, and the plurality of wordlines of the corresponding memory string,
- wherein each driver is connected to and drives the source line connected to the memory cell array unit corresponding to the driver, and
- wherein each driver receives a source voltage, and wherein each driver includes a source line high voltage controller receiving a source line enable signal and in response thereto producing a source gating voltage for connecting the source voltage to the source line connected to the corresponding memory cell array unit.
Dependencies are inferred from the claim text.