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AssigneeInternational Business Machines Corporation
InventorRobert C. Wong
Estimating the term…
A method for preparing a computer memory cell for a data write operation thereto is disclosed. The memory cell has a cell supply voltage source which is connected at one end to pull-up devices within the memory cell, and is connected at an opposite end to pull-down devices within the memory cell. The memory cell further has a pair of access transistors for selectively coupling the memory cell to a pair of complementary bitlines. In an exemplary embodiment, the method includes adjusting the voltage of the cell supply voltage source from a first voltage value to a second voltage value, the second voltage value being less than the first voltage value. The memory cell is then coupled to the pair of complementary bitlines, thereby facilitating the data write operation. Following the data write operation, the cell supply voltage is restored from the second voltage value back to the first voltage value.
A method for preparing a computer memory cell for a data write operation thereto, the memory cell having a cell supply voltage source connected at one end to pull-up devices within the memory cell and connected at an opposite end to pull-down devices within the memory cell, the memory cell further having and a pair of access transistors for selectively coupling the memory cell to a pair of complementary bitlines, the method comprising:
A method for writing a data bit into a computer memory cell, the computer memory cell having a cell supply voltage source connected at one end to pull-up devices within the memory cell and connected at an opposite end to pull-down devices within the memory cell, the memory cell further having and a pair of access transistors for selectively coupling the memory cell to a pair of complementary bitlines, the method comprising:
A computer memory storage cell, comprising:
A computer memory device, comprising:
Dependencies are inferred from the claim text.