Variable width wordline pulses in a memory device

A method of accessing an SRAM cell having a word line, the method comprising the steps of:

• determining whether an access to the SRAM cell is a read access or a write access;
• applying a word line pulse having a first width to the word line if the access is a read access;
• applying a word line pulse having a second width to the word line if the access is a write access, wherein the first width is different than the second width;
• pre-charging a pair of bit lines coupled to the SRAM cell for a first pre-charge period after applying the word line pulse having the first width;
• and
• pre-charging the pair of bit lines for a second pre-charge period after applying the word line pulse having the second width, wherein the first pre-charge period is different than the second pre-charge period.

A method of operating a static random access memory (SRAM) system, the method comprising the steps of:

• preventing read operations from being initiated during consecutive cycles of the SRAM system;
• determining whether an access to the SRAM system is a read access or a write access;
• applying a word line pulse to a word line of the SRAM system for a first period if the access is a read access;
• applying a word line pulse to a word line of the SRAM system for a second period if the access is a write access, wherein the first period is different than the second period;
• pre-charging a pair of bit lines of the SRAM system for a pre-charge period after applying the word line pulse having the second period,
• wherein a cycle time of the SRAM system is equal to the sum of the first period, the second period and the pre-charge period.

A method of operating a static random access memory (SRAM) system, the method comprising the steps of:

• preventing read operations from being initiated during consecutive cycles of the SRAM system;
• determining whether an access to the SRAM system is a read access or a write access;
• applying a word line pulse to a word line of the SRAM system for a first period if the access is a read access;
• applying a word line pulse to a word line of the SRAM system for a second period if the access is a write access, wherein the first period is different than the second period;
• pre-charging a pair of bit lines of the SRAM system for a pre-charge period after applying the word line pulse having the second period,
• wherein a cycle time of the SRAM system is equal to one half of the sum of the first period, the second period and the pre-charge period.