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US 6,549,184 B1Granted
Driving circuit of a semiconductor display device and the semiconductor display device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsJun Koyama, Shunpei Yamazaki
Life of this patent
Estimating the term…
Abstract
There are provided a driving circuit of a semiconductor display device which can obtain an excellent picture without picture blur (display unevenness) and with high fineness/high resolution, and the semiconductor display device. A buffer circuit used in the driving circuit of the semiconductor display device is constituted by a plurality of TFTs each having a small channel width, and a plurality of such buffer circuits are connected in parallel with each other.
Claims42
A semiconductor display device, comprising:
- a source signal line side driving circuit;
- and
- a gate signal line side driving circuit,
- wherein said gate signal line side driving circuit includes a buffer circuit connected with an output line from a shift register circuit, said buffer circuit having a plurality of inverters,
- wherein each of said inverters comprises a plurality of n-channel thin film transistors and a plurality of p-channel thin film transistors, and
- wherein each of said plurality of n-channel thin film transistors is connected parallel with each other and each of said plurality of p-channel thin film transistors is connected parallel with each other.
3 more elements
A semiconductor display device, comprising:
- a source signal line side driving circuit;
- and
- a gate signal line side driving circuit,
- wherein said source signal line side driving circuit includes a buffer circuit connected with an output line from a shift register circuit, said buffer circuit having a plurality of inverters,
- wherein each of said inverters comprises a plurality of n-channel thin film transistors and a plurality of p-channel thin film transistors, and
- wherein each of said plurality of n-channel thin film transistors is connected parallel with each other and each of said plurality of p-channel thin film transistors is connected parallel with each other.
3 more elements
A semiconductor display device, comprising:
- a source signal line side driving circuit;
- and
- a gate signal line side driving circuit,
- wherein said source signal line side driving circuit includes a buffer circuit connected with an output line from a shift register circuit, said buffer circuit having a plurality of first inverters,
- wherein said gate signal line side driving circuit includes a buffer circuit connected with a line from a shift register circuit, said buffer circuit having a plurality of second inverters,
- wherein each of said first and second inverters comprises a plurality of n-channel thin film transistors and a plurality of p-channel thin film transistors, and
- wherein each of said plurality of n-channel thin film transistors is connected parallel with each other and each of said plurality of p-channel thin film transistors is connected parallel with each other.
4 more elements
A display device having at least one driving circuit, said driving circuit comprising:
- a buffer circuit connected with an output line from a shift register, said buffer circuit having a plurality of inverters,
- wherein each of said inverters comprises a plurality of n-channel thin film transistors and a plurality of p-channel thin film transistors, and
- wherein each of said plurality of n-channel thin film transistors is connected parallel with each other and each of said plurality of p-channel thin film transistors is connected parallel with each other.
A display device having at least one driving circuit, said driving circuit comprising:
- a buffer circuit connected with an output line from a shift register, said buffer circuit having a plurality of inverters,
- wherein each of said inverters comprises a plurality of n-channel thin film transistors and a plurality of p-channel thin film transistors,
- wherein each of said plurality of n-channel thin film transistors is connected parallel with each other and each of said plurality of p-channel thin film transistors is connected parallel with each other, and
- wherein said plurality of n-channel thin film transistors and said plurality of p-channel thin film transistors in said inverters have channel width of 100 μm or less.
1 more element
A display device having at least one driving circuit, said driving circuit comprising:
- a buffer circuit connected with an output line from a shift register, said buffer circuit having a plurality of inverters,
- wherein each of said inverters comprises a plurality of n-channel thin film transistors and a plurality of p-channel thin film transistors,
- wherein each of said plurality of n-channel thin film transistors is connected parallel with each other and each of said plurality of p-channel thin film transistors is connected parallel with each other, and
- wherein channel width of said plurality of n-channel thin film transistors and said plurality of p-channel thin film transistors in one of said inverters is different from that of said plurality of n-channel thin film transistors and said plurality of p-channel thin film transistors in another one of said inverters.
1 more element
A display device having at least one driving circuit and a pixel portion over a substrate, said driving circuit comprising:
- a buffer circuit connected with an output line from a shift register, said buffer circuit having a plurality of inverters,
- wherein each of said inverters comprises a plurality of n-channel thin film transistors and a plurality of p-channel thin film transistors, and
- wherein each of said plurality of n-channel thin film transistors is connected parallel with each other and each of said plurality of p-channel thin film transistors is connected parallel with each other.
A display device having at least one driving circuit and a pixel portion over a substrate, said driving circuit comprising:
- a buffer circuit connected with an output line from a shift register, said buffer circuit having a plurality of inverters,
- wherein each of said inverters comprises a plurality of n-channel thin film transistors and a plurality of p-channel thin film transistors,
- wherein each of said plurality of n-channel thin film transistors is connected parallel with each other and each of said plurality of p-channel thin film transistors is connected parallel with each other, and
- wherein said plurality of n-channel thin film transistors and said plurality of p-channel thin film transistors in said inverters have channel width of 100 μm or less.
1 more element
A display device having at least one driving circuit and a pixel portion over a substrate, said driving circuit comprising:
- a buffer circuit connected with an output line from a shift register, said buffer circuit having a plurality of inverters,
- wherein each of said inverters comprises a plurality of n-channel thin film transistors and a plurality of p-channel thin film transistors,
- wherein each of said plurality of n-channel thin film transistors is connected parallel with each other and each of said plurality of p-channel thin film transistors is connected parallel with each other, and
- wherein channel width of said plurality of n-channel thin film transistors and said plurality of p-channel thin film transistors in one of said inverters is different from that of said plurality of n-channel thin film transistors and said plurality of p-channel thin film transistors in another one of said inverters.
1 more element
A display device having at least one driving circuit and a pixel portion over a substrate, said driving circuit comprising:
- a buffer circuit connected with an output line from a shift register, said buffer circuit having a plurality of inverters,
- wherein each of said inverters comprises a plurality of n-channel thin film transistors and a plurality of p-channel thin film transistors,
- wherein each of said plurality of n-channel thin film transistors is connected parallel with each other and each of said plurality of p-channel thin film transistors is connected parallel with each other, and
- wherein said plurality of n-channel thin film transistors are formed over a first semiconductor layer and said plurality of p-channel thin film transistors are formed over a second semiconductor layer.
1 more element
Dependencies are inferred from the claim text.