Digital-to-analog converting device and method used in home networking system with compensation mechanism to reduce clock jitter

A digital-to-analog converter for generating an analog signal in response to a first clock signal having a first period TA and a second clock signal having a second period TB, comprising:

• a phase monitor generating an index signal according to a phase relationship between said first and said second clock signals;
• a plurality of waveform sample tables storing therein a plurality of sets of waveform samples, respectively, each of which is enabled by said first clock signal to sequentially output said set of waveform samples in response to a series of triggering of said second clock signal, wherein a delay time is present between every two adjacent sets of waveform samples, and an overall delay time between the earliest and the latest sets of waveform samples is less than said second period;
• a multiplexer electrically connected to said phase monitor, and said plurality of waveform sample tables for permitting one of said plurality of sets of waveform samples to be outputted in response to said index signal;
• and
• a digital-to-analog circuit electrically connected to said multiplexer for converting said waveform samples outputted through said multiplexer into an analog signal.

A method for converting a digital signal into an analog signal in response to a first clock signal having a first period and a second clock signal having a second period, comprising steps of:

• monitoring a phase relationship between said first and second clock signals;
• starting transmission of a plurality of pre-stored series of waveform samples in response to each rising edge of said first clock signal, wherein a phase difference is present between every two adjacent series of waveform samples;
• outputting said waveform samples of each series in response to rising edges of said second clock signal;
• and
• selecting one of said plurality of pre-stored sets of waveform samples to be converted into an analog signal according to said phase relationship.