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US 6,549,154 B2Granted
Digital-to-analog converter and synchronous circuit using the converter
AssigneeKabushiki Kaisha Toshiba
InventorsKatsuaki Isobe, Satoshi Eto
Life of this patent
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Abstract
A digital-to-analog converter circuit includes a converter configured to convert digital signals of bit n (n=0, 1, 2, . . . , N) to voltage values, a plurality of amplifiers configured to output currents having different values in accordance with the voltage values, and an adder configured to assigning weights to the currents and adding the currents together in response to the digital signal of bit n.
Claims20
A digital-to-analog converter circuit comprising:
- a converter configured to convert digital signals of bit n (n=0, 1, 2, . . . , N) to voltage values;
- a plurality of amplifiers configured to output currents having different values in accordance with the voltage values;
- and
- an adder configured to assigning weights to the currents and adding the currents together in response to the digital signal of bit n.
1 more element
A synchronous circuit comprising:
- a digital-to-analog converter circuit including a converter configured to convert digital signals of bit n (n=0, 1, 2, . . . , N) to voltage values, a plurality of amplifiers configured to output currents having different values in accordance with the voltage values obtained by the converter, and an adder configured to assign weights to the currents and add the currents together in response to the digital signals of bit n;
- a delay line including a unit delay element that receives an output from the digital-to-analog converter circuit and varies in delay amount according to the output;
- a phase detector configured to compare an output of the delay line and a phase of a reference signal with each other;
- and
- a generator configured to generate the digital signal of bit n in response to an output of the phase detector.
2 more elements
A synchronous circuit comprising:
- a digital-to-analog converter circuit including a converter configured to convert digital signals of bit n (n=0, 1, 2, . . . , N) to voltage values, a plurality of amplifiers configured to output currents having different values in accordance with the voltage values obtained by the converter, and an adder configured to assign weights to the currents and add the currents together in response to the digital signals of bit n, the adder having a common node supplied with the added currents and connected to a gate and a drain of a transistor;
- a delay line including a unit delay element that receives an output from the digital-to-analog converter circuit and varies in delay amount according to the output;
- a phase detector configured to compare an output of the delay line and a phase of a reference signal with each other;
- and
- a generator configured to generate the digital signal of bit n in response to an output of the phase detector.
2 more elements
Dependencies are inferred from the claim text.