Synchronous delay generator
AssigneeQUALCOMM Incorporated
InventorsMaurizio Di Veroli, Ayal Bar-David
Life of this patent
Estimating the term…
Abstract
A method for generating a variable delay of a signal, including: providing a clock indicating a sequence of sample times at regular intervals and receiving a sequence of input samples representing input values of the signal at respective sample times indicated by the clock. The method further includes determining the delay with a temporal resolution substantially finer than the clock interval to be applied to the signal at each of the respective sample times. For each of the sample times, responsive to the respectively-determined delay, one or more of the input samples are processed so as to generate a corresponding output sample representing a delayed output value of the signal at the sample time.
Claims16
A method for generating a variable delay of an input signal, comprising:
- providing a clock signal having a pre-selected period;
- sampling said input signal using said clock signal to form a plurality of input signal samples;
- calculating a delay time in response to a parameter that varies over time, which is less than said pre-selected period of said clock signal;
- and
- processing at least one of said input samples so as to generate a corresponding delayed output sample which represents a delayed output value of the input signal at the sample time.
A method for generating a variable delay of an input signal, comprising:
- providing a clock signal having a pre-selected period;
- calculating a delay time which is less than said pre-selected period of said clock signal;
- processing at least one of said input signal samples, so as to generate a corresponding delayed output sample which represents a delayed output value of the input signal at the sample time, the processing of the input samples including dividing the delay into a coarse and a fine component.
A variable delay generator, which receives an input a signal, comprising:
- a clock signal generator for generating a clock signal having a pre-selected period;
- a delay controller, configured to calculate a delay time which is less than said pre-selected period of said clock signal, and which divides said variable delay-into a coarse and a fine component;
- and
- a delay line which receives at least one of the input signal samples and outputs a synchronous stream of output samples from said input samples at a respective delay determined by the delay controller.
A variable delay generator, which receives an input a signal over a predetermined period and provides delayed samples whose output is synchronized with input samples, comprising:
- a clock signal generator generating clock a signal having a pre-selected period;
- means for calculating a delay time, which is less than said pre-selected period of said clock signal;
- and
- a generator for compensating for a difference between an actual delay time and the required delay time, which difference is evaluated over a time interval substantially finer than said pre-selected period of said clock.
Dependencies are inferred from the claim text.