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US 6,549,006 B2Granted
Eddy current measurements of thin-film metal coatings using a selectable calibration standard
OwnerCuong Duy Leinventor
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OwnerCuong Duy Leinventor
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A method for identifying metal layer thickness of an inspection sample according to one embodiment utilizes an eddy current probe to obtain initial resistance and reactance measurements from the inspection sample. Once these measurements have been obtained, the relative distance between the eddy current probe and inspection sample is increased and terminating resistance and reactance measurements are obtained. An inspection sample intersecting line may then be calculated using the initial and terminating resistance and reactance measurements. An intersecting point between a natural intercepting curve and the inspection sample intersecting line may also be determined. A reactance voltage of the intersecting point along a digital calibration curve is calculated to identify a closest two of a plurality of calibration samples. The metal layer thickness of the inspection sample may then be calculated by performing an interpolation between the identified closest two calibration samples.
A method for identifying metal layer thickness of an inspection sample, said method comprising:
A system for identifying metal layer thickness of an inspection sample, said system comprising:
A method for generating an eddy current probe digital calibration curve, said method comprising:
Dependencies are inferred from the claim text.
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From the US filing history. Foreign family members aren’t listed.
Using magnetic means, e.g. by measuring change of reluctance: for measuring thickness of coating
Measuring length, thickness or similar linear dimensions
Term ended 7 Apr 2020 (estimated)
The present invention is directed to measuring metal coatings on semiconductor wafer products, and more particularly, to measuring the thickness and sheet resistance of thin-film metal coatings on semiconductor wafer products using selectable calibration materials.
As semiconductor wafers increase in size, the costs involved in the production of these wafers also increase. The semiconductor fabrication industry continues to demand higher yields and shorter fabrication times, while insisting upon ever-increasing quality standards. A variety of inspection procedures have been employed during various stages of the semiconductor wafer fabrication process in an attempt to meet these demands. These inspection procedures include destructive, as well as nondestructive testing methods.
During a chemical mechanical polishing (CMP) process, for example, measurement of the thickness of a deposited metal layer on a semiconductor substrate is often required. Metal layer measurements may be performed off-line during a standalone process, or as part of the fabrication process.
FIG. 1 is a diagram showing an eddy current measuring system according to one embodiment of the present invention;
FIG. 2 is a graph showing curves relating to eddy current measurements taken from calibration and inspection samples having, respectively, known and unknown thicknesses;
FIG. 3 is a graph showing the formation of a natural intercepting curve defined by the initial resistance and reactance values (X,Y) for each of the calibration sample curves A through E;
FIG. 1 is a diagram showing an eddy current measuring system according to one embodiment of the present invention. As shown, the system includes a probe housing 3 having a sense coil 1, reference coil 2, and a capacitance sensor 20. The probe housing 3 is shown in communication with a linear motion controller 25 which, during operation, translates the probe housing 3 relative to a measuring sample 5. Specifically, the linear motion controller 25 translates the probe along a vertical axis Z that is normal to a top layer 4 of the measuring sample 5. A measuring sample 5 may include an inspection sample or a calibration sample; an “inspection sample” referring to a substrate having a top metal layer of unknown thickness, and a “calibration sample” denoting a substrate having a top metal layer of a known thickness.
The sense and reference coils 1, 2 are similarly configured such that both coils are constructed of ferrite cores of the same size, have the same number of coil turns, and are both constructed of similarly sized magnetic cable (40 gauge). The sense and reference coils 1, 2 should be fabricated so that their respective inductance values are equal at 10 MHz, while the resistance of each coil 1, 2 must be less than 20 Ohms.
An AC voltage source 6 is electrically connected to a Wheatstone Bridge 7, which in turn contains sense and reference coils 1, 2. The AC voltage source 6 acts as a voltage driver providing pre-selected sinusoidal waves at 10 MHz or higher to the Wheatstone Bridge 7. Preferably, a sinusoidal wave is utilized so that the maximum phase separation between samples of differing thicknesses can be realized. FIG. 1 further shows the system having an adjustable electronic bridge circuit 8 applied to the Wheatstone Bridge 7.