Metal oxide semiconductor field effect transistor for reducing resistance between source and drain
AssigneeSamsung Electronics Co., Ltd.
InventorsJeong-hwan Yang, Young-wug Kim
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AssigneeSamsung Electronics Co., Ltd.
InventorsJeong-hwan Yang, Young-wug Kim
Estimating the term…
A MOS field effect transistor for reducing the resistance between a source and a drain includes a gate insulation layer and a gate electrode sequentially formed on a semiconductor substrate includes deep source/drain regions formed in upper portions of the semiconductor substrate at both sides of the gate electrode. Source/drain extension regions are formed in upper portions of the semiconductor substrate extending from the deep source/drain regions toward a channel region below the gate electrode to be thinner than the deep source/drain regions. A first silicide layer having a first thickness is formed on the surface of each of the deep source/drain regions. A second silicide layer having a second thickness thinner than the first thickness of the first silicide layer is formed to extend from the first silicide layer in a predetermined upper portion of each of the source/drain extension regions.
A MOS field effect transistor comprising:
Dependencies are inferred from the claim text.