Method for self-aligned shallow trench isolation and method of manufacturing non-volatile memory device comprising the same

A method of manufacturing a non-volatile memory device comprising:

• forming a first_oxide layer for a gate oxide layer on a semiconductor substrate;
• forming a first conductive layer on said oxide layer;
• forming a nitride layer on said first conductive layer;
• forming a second oxide layer on said nitride layer;
• forming an anti-reflective layer on said second oxide layer;
• etching said anti-reflective layer, said second oxide layer, said nitride layer, said first conductive layer and said first oxide layer using a single mask, to thereby form a first oxide layer pattern, a first conductive layer pattern, a nitride pattern, a second oxide layer pattern and an anti-reflective layer pattern;
• etching the upper portion of said substrate adjacent to said first conductive layer by using said mask, to thereby form a trench aligned with said first conductive layer pattern for defining an active region of said substrate and to simultaneously remove said anti-reflective layer pattern;
• forming a trench inner-wall oxide layer on the inner surface of said trench by chemical vapor deposition (CVD), to prevent the formation of a positive profile at sidewalls of said first conductive layer pattern;
• annealing said trench inner-wall oxide layer in one of an N2O and NO atmosphere to form an oxynitride layer at the interface between said substrate and said trench inner-wall oxide layer;
• forming a field oxide layer for filling up the trench;
• and
• successively forming a dielectric interlayer and a control gate on said first conductive layer pattern.