Method of fabricating trench for SOI merged logic DRAM

A method of forming a merged logic DRAM device having a trench etched into a silicon-on insulator (SOI) substrate without etching into a buried oxide (BOX) layer present in said SOI substrate, said method comprising the steps of;

• providing a silicon substrate having an insulator layer formed thereon, said substrate further comprising selected array device areas and selected logic device areas;
• forming a photoresist on said insulator layer;
• providing an opening in said photoresist and said insulator layer in said selected array device areas;
• etching the trench through said opening into said silicon substrate;
• removing said photoresist;
• filling said trench with a trench fill material;
• removing said insulator layer;
• forming a sacrificial oxide layer on said silicon substrate;
• forming said continuous BOX layer in said silicon substrate;
• planarizing the resulting structure;
• and
• removing said trench fill material and said BOX layer from said trench.