Low voltage variable gain amplifier with constant input impedance and adjustable one-pole filtering characteristic

A variable gain amplifier with constant input impedance and one pole filter characteristics, said variable gain amplifier comprising:

• an op-amp comprising:
• a non-inverting input;
• a non-inverting output;
• an inverting input;
• an inverting output;
• a first amplifying stage having a first input operatively connected to said non-inverting input, a second input operatively connected to said inverting input, a first output operatively connected to said non-inverting output and a second output operatively connected to said inverting output;
• a first set of resistor-capacitor branches, each branch having a resistance and capacitance connected in series, each resistor-capacitor branch of said first set connected in parallel between said first output of said second amplifying stage and said first input of said second amplifying stage, each branch selectively activated to add to a total capacitance or deactivated to subtract from a total capacitance so as to change an open loop bandwidth of said op-amp for said non-inverting, and
• a second set of resistor-capacitor branches, each branch having a resistance and capacitance connected in series, each resistor-capacitor branch of said second set connected in parallel between said second output of said second amplifying stage and said second input of said second amplifying stage, each branch selectively activated to add to a total capacitance or deactivated to subtract from a total capacitance so as to change an open loop bandwidth of said op-amp for said inverting input;
• a first variable capacitor array connected between said op-amp non-inverting output and said op-amp non-inverting input;
• a second variable capacitor array connected between said op-amp inverting output and said op-amp inverting input;
• a first feedback resistor connected between said op-amp non-inverting output and said op-amp non-inverting input;
• a second feedback resistor connected between said op-amp inverting output and said op-amp inverting input;
• a first set of two or more parallel resistors, each of said parallel resistors having one terminal connected to a first variable gain amplifier input node, at least one of said resistors having a second terminal connected to said op-amp non-inverting input, a remainder of said resistors of said first set having a second terminal selectively connected between said non-inverting input and a circuit node via a switch, and
• a second set of two or more parallel resistors, each of said parallel resistors having one terminal connected to a second variable gain amplifier input node, at least one of said resistors having a second terminal connected to said op-amp inverting input, a remainder of said resistors of said second set having a second terminal selectively connected between said inverting input and said circuit node via a switch.

A method of adjusting the gain and filtering characteristics of an analog front-end system, said method comprising:

• providing a variable gain amplifier comprising:
• an op-amp having an inverting input, an inverting output, a non-inverting input, a non-inverting output and an internal compensation network, said internal compensation network adjusting an open loop bandwidth of said op-amp in response to a received digital signal;
• a first feedback resistor connected between said inverting output and said inverting input and a second feedback resistor connected between said non-inverting output and said non-inverting input;
• a first variable capacitor array connected between said inverting output and said inverting input and a second variable capacitor array connected between said non-inverting output and said non-inverting input;
• a first set of two or more parallel resistors, each of said parallel resistors having one terminal connected to a first variable gain amplifier input node, at least one of said resistors having a second terminal connected to said op-amp non-inverting input, a remainder of said resistors of said first set having a second terminal selectively connected between said non-inverting input and a circuit node via a switch, and
• a second set of two or more parallel resistors, each of said parallel resistors having one terminal connected to a second variable gain amplifier input node, at least one of said resistors having a second terminal connected to said op-amp inverting input, a remainder of said resistors of said second set having a second terminal selectively connected between said inverting input and said circuit node via a switch;
• setting a total capacitance of said first and second variable capacitor arrays to provide predetermined filter characteristics by providing a digital signal to said;
• adjusting a gain of said variable gain amplifier by providing a digital signal to said first and second sets of resistors causing a predetermined number of said remainder of resistors to be switched to said op-amp inputs, and
• adjusting filter characteristics of said variable gain amplifier to said predetermined filter characteristics upon said adjustment of said gain by providing a digital signal to said op-amp to adjust said open loop bandwidth via said op-amp internal compensation network.

A differential variable gain amplifier having constant input impedance, said variable gain amplifier comprising:

• an op-amp, said op-amp having a first feedback resistor connected between a first output and a non-inverting input, said op-amp having a second feedback resistor connected between a second output and an inverting input;
• a first set of n+1 parallel resistors having resistance R, each of said parallel resistors having one terminal connected to a first variable gain amplifier input node, one of said resistors having a second terminal connected to said op-amp non-inverting input, n resistors of said first set having a second terminal selectively connected between said non-inverting input and a circuit node via a switch;
• a second set of n+1 parallel resistors having resistance R, each of said parallel resistors having one terminal connected to a second variable gain amplifier input node, one of said resistors having a second terminal connected to said op-amp inverting input, n resistors of said first set having a second terminal selectively connected between said inverting input and said circuit node via a switch, and
• wherein said first and said second sets of resistors provide a constant input impedance equal to R/(n+1) for said first and said second variable gain amplifier input nodes.